SK-AM62B-P1: TPS6521904 – No BUCK outputs after power-up on custom board

Part Number: SK-AM62B-P1


Hello TI Team,

We are facing a power-up issue with TPS6521904 on a custom board and would appreciate your guidance.

PMIC Details

  • PMIC Variant: TPS6521904RHBR

  • Application: Custom SK-AM62B-P1-based board

  • Input Supply: VCC_MAIN = 3.3 V (verified stable at PMIC input)

  • PMIC Configuration:

    • Using factory TPS6521904RHBR variant

    • Power tree designed strictly as per TI SK-AM62B-P1  reference design

Enclosing the snippet of PMIC schematic used in custom board:
image.png

  • + Name updated

    Hello Mallika Vignesh,

    Thank you for the query.

    Can you probe the output rails and check if they are coming up during power-up

    Please share a searchable PDF version for review.

    Please expect delayed response due to the weekend holidays.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    I have verified the output rails, there is nothing even during power-up.

    Regards,

    Malli

  • Hello Mallika Vignesh,

    Can i assume you used an oscilloscope to measure the outputs?

    If not please connect an oscilloscope and check.

    Regards,

    Sreenivasa

  • Hello Sreenivasa,

    Yes , I have used oscilloscope connected to rails when powered-up.
    But there is no output.
    I am hereby sharing the schematics of custom board.5621.Optilink_Plus_RevC_sch.pdf

    Regards,
    Mallika

  • Hi Sreenivasa,


    We are seeing a repeatable power-up issue that appears to match the datasheet “VSYS slow ramp with FSD enabled” behavior. Sharing scope waveforms.

    Setup:

    • SoC-to-PMIC interface was isolated during this test (to avoid any SoC influence/backfeed)

    • Measurement points:

      • CH1 (Yellow): VSYS (PMIC input supply)

      • CH2 (Purple): BUCK2 output.

    Regards,
    Mallika

  • Hello Mallika, 

    Thank you.

    • SoC-to-PMIC interface was isolated during this test (to avoid any SoC influence/backfeed)

      Please elaborate the circuit that was isolated Did you isolate any of the supply rails?

    Can you probe all the buck outputs

    Can you explain the above waveform?

    I am not sure on the reason for the input voltage to fluctuate. Can you confirm the input voltage is stable?

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    PMIC outputs fully isolated from SoC and peripherals.
    PMIC powered only from its 3.3v stable input
    Here are the waveforms for all the buck outputs.

    • CH1 (Yellow): VSYS (PMIC input supply)

    • CH2 (Purple): BUCK1 output.

    • CH1 (Yellow): VSYS (PMIC input supply)

    • CH2 (Purple): BUCK2 output.

    • CH1 (Yellow): VSYS (PMIC input supply)

    • CH2 (Purple): BUCK3 output.

    • I am sharing the logic analyzer output where channel 2 is supply voltage and all other channels are output rails.


    • Note:


      • In the TI schematic, a pull-up resistor R618 (10k to VCC_3V3_MAIN) is shown on the PMIC_PBn net.

      • However, on the physical TI SK-AM62B-P1 EVM board, R618 appears to be not populated (DNP), yet PMIC_PBn still reads ~3.3V and the PMIC sequences normally.

      On our custom board, we followed the schematic and populated R618 = 10k. Is R618 intended to be populated on custom designs, or should it be DNP like on the EVM?


      Regards,
      Malli