Part Number: AM6442
Hello,
While reviewing gptimer.c I found an issue in this function:
static void GPTIMER_clrIRQStatus(uint32_t baseAddr, uint32_t mask)
{
volatile uint32_t *addr = (volatile uint32_t *)(baseAddr + TIMER_IRQSTATUS);
*addr |= mask;
}
According to the documentation:
The operation uses a read-modify-write OR. This register is write‑one‑to‑clear (W1C), so the correct action is a direct write of the mask, not an OR. While it may not cause functional issues right now, it adds a substantial number of additional CPU cycles.
Regards,
Peter