Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH
We are currently developing a system based on TDA4VH and would like to confirm its video encoding capability.
Based on the documentation, TDA4VH integrates two video encoder cores. For an encode-only use case, is it correct to understand that:
- The total equivalent encoding throughput is 2 × 4K@60, and
- The total number of encoding instances is ≤ 64 ?
Under the above assumptions, we would like to confirm whether TDA4VH can support the following encoding workload:
-
Codec: H.265 / HEVC
-
Profile: HEVC_MAIN
-
Level: 5.1
-
Rate Control Mode: LOW_LATENCY
Encoding channels (all at 20 fps):
-
13 × 1280×720
-
1 × 1024×576
-
2 × 576×648
-
2 × 480×288
-
4 × 960×768
-
1 × 640×512
-
1 × 512×896
The total encoding load is estimated to be approximately 35% of the 2 × 4K@60 equivalent throughput, with 24 encoding instances in total.
Could you please confirm whether this workload is supported, and whether there are any additional limitations (e.g., per-core channel limits, driver/firmware constraints, or CMA memory requirements) that we should be aware of?
Thank you.
