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DRA821U: Different IOPAD offset values shown after importing the same Device Tree into SysConfig

Part Number: DRA821U
Other Parts Discussed in Thread: SYSCONFIG, , DRA821

We imported the following existing Device Tree into the TI SysConfig tool.

mymcu_rgmii1_pins_default: mymcu_rgmii1-default-pins {
	pinctrl-single,pins = <
		J72000_WKUP_IOPAD(0x94, PIN_INPUT, 0) /* (A9) MCU_RGMII1_RD0 */
		J72000_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (B9) MCU_RGMII1_RD1 */
		J72000_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (A10) MCU_RGMII1_RD2 */
		J72000_WKUP_IOPAD(0x88, PIN_INPUT, 0) /* (C10) MCU_RGMII1_RD3 */
		J72000_WKUP_IOPAD(0x84, PIN_INPUT, 0) /* (B10) MCU_RGMII1_RXC */
		J72000_WKUP_IOPAD(0x6c, PIN_INPUT, 0) /* (A11) MCU_RGMII1_RX_CTL */
		J72000_WKUP_IOPAD(0x7c, PIN_OUTPUT, 0) /* (D10) MCU_RGMII1_TD0 */
		J72000_WKUP_IOPAD(0x78, PIN_OUTPUT, 0) /* (B11) MCU_RGMII1_TD1 */
		J72000_WKUP_IOPAD(0x74, PIN_OUTPUT, 0) /* (B12) MCU_RGMII1_TD2 */
		J72000_WKUP_IOPAD(0x70, PIN_OUTPUT, 0) /* (C12) MCU_RGMII1_TD3 */
		J72000_WKUP_IOPAD(0x80, PIN_OUTPUT, 0) /* (A12) MCU_RGMII1_TXC */
		J72000_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (D11) MCU_RGMII1_TX_CTL */
	>;
};

However, after importing this Device Tree into the TI SysConfig tool and checking the generated Device Tree, it is displayed as follows:

mymcu_rgmii1_pins_default: mymcu_rgmii1-default-pins {
	pinctrl-single,pins = <
		J7200_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A9) MCU_RGMII1_RD0 */
		J7200_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B9) MCU_RGMII1_RD1 */
		J7200_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (A10) MCU_RGMII1_RD2 */
		J7200_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (C10) MCU_RGMII1_RD3 */
		J7200_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B10) MCU_RGMII1_RXC */
		J7200_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (A11) MCU_RGMII1_RX_CTL */
		J7200_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D10) MCU_RGMII1_TD0 */
		J7200_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (B11) MCU_RGMII1_TD1 */
		J7200_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (B12) MCU_RGMII1_TD2 */
		J7200_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (C12) MCU_RGMII1_TD3 */
		J7200_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (A12) MCU_RGMII1_TXC */
		J7200_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D11) MCU_RGMII1_TX_CTL */
	>;
};

As shown above, the IOPAD offset values are different, even though the pin names and functions are the same.

Has there been any change in the SysConfig tool on the TI website regarding the IOPAD offset calculation or representation?
Could you please clarify why the same Device Tree file results in different offset values when imported into SysConfig?

  • RGMII is shown here as an example, but several other pins/interfaces are also displayed with different values.

  • Hi Dongwang,

    I am looking into this for you. 

    Using SysConfig and the DRA821U device, I am able to replicate the new device tree that you shared, but I am unable to find a device or configuration that produces the J72000 header that is in your existing device tree. Could you provide some history on how the existing device tree was created and when?

    Best Regards,

    Miles

  • Hello Miles

    Thanks for your replying

    My existing device tree is created in 2024.04.26

    After comparing two DRA821 Device Tree files (devicetree_240426.dtsi and devicetree_251222.dtsi), we found that the same pins consistently have different IOPAD offset values, even though the pin names, ball locations, and functions are identical.

    The offset differences follow clear patterns:

    • Most pins differ by +0x68
      (e.g. MCU_RGMII1_, MCU_OSPI0_, MCU_UART0_, MCU_I2C0_, WKUP_GPIO0_*)

    • Some pins differ by +0x174
      (e.g. PORz, RESET_REQz, TDI, TDO, WKUP_GPIO0_78, WKUP_GPIO0_84)

    • One pin differs by +0x38
      (MCU_OSPI0_CSn2)

    This behavior is not limited to RGMII; RGMII was only used as an example. Several other interfaces show the same offset differences.

    pls check the history 

    Best regards

    Dongwang

  • Hi Dongwang,

    Thank you for the clarification. While I look further into any changes that may have been made, I have some questions for you. Have you been in production with the first configuration files? Is there any reason why we should not prioritize the second/more recent configuration?

    Our concern is that the first configuration file may not be valid; the invalid j72000 part number, and the inconsistencies you identified infer this.

    Best Regards,

    Miles

  • Thank you for your response.

    To answer your questions, the first configuration file is currently being used in production, and we have not observed any functional issues in our system.
    We are using SDK version 9.x with this configuration.

    Given this, we are wondering whether the differences we are seeing could be related to SDK version–specific handling of the pinmux / IOPAD offset definitions, rather than the configuration itself being invalid.

    Since the system is operating correctly in production with the first configuration, we would like to better understand:

    • Whether the interpretation or representation of IOPAD offsets has changed between SDK versions

    • And whether the second, more recent configuration is specifically aligned with newer SDK or SysConfig releases

    Any clarification on the relationship between SDK version and the Device Tree / pinmux offset representation would be greatly appreciated.

    Best regards,

  • Thank you for the clarification. 

    I will look into this for you. There may be some delay due to the holidays, but i will try to get you an answer as soon as I can. 

    Best Regards,

    Miles

  • Hi,

    However, after importing this Device Tree into the TI SysConfig tool and checking the generated Device Tree, it is displayed as follows:

    The observation of different offsets in the device trees is because they both might be referenced under different nodes.

    Please have a look at the starting/base address of various wakeup pinmux nodes in the Linux device tree.


    If "mymcu_rgmii1_pins_default" is referenced under wkup_pmx0 then 0x94 is offset for A9 as base address of 0x00 (actual address will be 0x00 + 0x94 = 0x94), when the same is referenced under wkup_pmx2 then offset becomes 0x1C as base address of 0x68 (actual address will be 0x68 + 0x2C = 0x94)

    Please note that the actual pinmux address for A9 is always same from SoC.

    Best Regards,
    Sudheer