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DRA829J: Clarification on NAVSS interconnects

Part Number: DRA829J
Other Parts Discussed in Thread: DRA829

Hi TI Team,

DRA829 TRM chapter 10 contans the following (MCU) NAVSS Interconnets overviews:

image.png

image.png

My issue is that I cannot find any good clarification for the marked request paths. What are the MEM0/1 and UMEM in this context?

Thanks,
Dmitry