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AM3517 EVM - BSL and performance

Other Parts Discussed in Thread: AM3517

Hello,

I'm using a AM3517 EVM board and I tried to use the BSL (so without any OS). I managed to build the Dhrystone 2.1 benchmark but the result is very bad : 28-30 MIPS. I guess it is due to the low frequency configuration of the processor. I read a little bit the source code of the BSL startup part, and I find a "init_clock()" function that seems to set the CPU clock to 500MHz. This code is only executed when the application is not located in the DDR (I tried to force it and the application hang on :) ).

So I change the location of the binary and I put it in SRAM. Everything is working fine BUT the result doesn't change : 28 MIPS. When I run this program on Linux, I get almost 1200 MIPS (as expected).

Someone can help me on this tricky problem ?

Thank you in advance,

 

  • Philippe,

    are you sure that MMU and Caches are enabled?

    You might want some basic code for controlling that Cortex-A8 blocks... generally I see multiple options:

    - download latest Sys/Bios 6.33 which supports AM335x (and therefor Cortex-A8). Look up the system init code (maybe difficult to find...). Generally Sys/Bios is great for performance eval as it provides a lot of basic application support (including project wizards) but doesn't generate a lot of overhead.

    - use Linux and lookup the init code (again not trivial...)

    - download latest Starterware for AM335x. Again there is Cortex-A8 architecture support there although the main target is a different device. The code in system-config\armv7a\src\gnu folder should work on AM35xx devices too as the core is the same as on AM335x devices.

    Regards.

  • The MMU is disabled (but well, it's normal without any OS or complexe application). I tried to enable the caches and branche prediction, but nothing change on the result. So I do it in the other way to check my work : I disabled the caches and logic prediction and the result changed : 16 MIPS (fortunately in a way :) ).

    Is there a way to read the actual speed of the CPU ? (I'm reading the manual now, but its a big bunch of papers).

     

  • Philippe,

    without MMU (and according setup of the MMU table) you will not get to full performance (on any Cortex-A8 device). MMU table defines what memory gets cached into L2 cache.

    Regards.

  • I enabled the MMU (following the example of the Starterware - by the way, it could be nice to have the same for the AM35xx) and there is a big improvement : I get 70 MIPS now :)

    I don't fine tune the MMU for now, but do you think t the missing 1000 MIPS can be retrieved via a good MMU configuration? Or are there other potential bottlenecks?