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AM62L: AM62L SR1.1 – eMMC Boot Instability / Inconsistent Boot Behavior

Part Number: AM62L

Dear TI Support Team,

We are currently evaluating the AM62L (SR1.1) device on our custom hardware platform and are facing intermittent and inconsistent boot failures from eMMC. We would like to seek your guidance on whether this behavior is a known limitation of the silicon or related to configuration or boot sequencing.

Platform Details
SoC: AM62L (Silicon Revision SR1.1)
Boot Medium: eMMC
Boot Mode: Reduced Pin Count (BOOTMODE)

Software Stack:
U-Boot (TI SDK 11.01.16.13)
Linux (Yocto-based BSP)

Observed Behavior:
Boot behavior is inconsistent across board power on/off cycles.

Below is a representative console log captured during failure:
NOTICE:  bl1_plat_arch_setup arch setup
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):9f56914fa-dirty
NOTICE:  BL1: Built : 13:13:15, Nov 27 2025
NOTICE:  BL1: dram_class: 11
NOTICE:  lpddr4: post start - PI training status=0x27c0a000
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):9f56914fa-dirty
NOTICE:  BL31: Built : 13:13:15, Nov 27 2025
NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-g69a2476ac276 (Nov 27 2025 - 13:22:39 +0000)
SPL initial stack usage: 1936 bytes
Trying to boot from MMC0
mmc_load_image_raw_sector: mmc block read error
Partition 1 invalid on device 0
spl_register_fat_device: fat register err - -1
spl_load_image_fat: error reading image u-boot.img, err - -1
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

Observations:
eMMC boot inconsistency behaviour observed with While doing power/on off.
Issue is reproducible across multiple boards.
Issue is observed only on SR1.1 silicon.

Questions / Clarifications Requested
Is this eMMC boot instability a known issue on AM62L SR1.1?
Are there any documented errata or ROM limitations affecting eMMC boot on SR1.1?
Are there any recommended boot mode, strap, or timing constraints specific to SR1.1?
Is this behavior resolved or improved in later silicon revisions (e.g., SR2.x)?
Are there any PMIC sequencing or power-up timing requirements specific to SR1.1 that could impact eMMC boot reliability?

We would appreciate your guidance on this issue and any recommended work around or best practices.

Since its very urgent and looks like very critical issue, so kinldy help me resolve the issue as soon as possbile.

Thank you for your support.

Thanks and Best regards,
Kumaresan G

  • Hello,

    Is this eMMC boot instability a known issue on AM62L SR1.1?

    I don't think it is a known issue but I will double check with the team once.

    May I know the occurate rate of this issue?

    Could you please share the successful boot logs as well?

    Thanks!

  • Dear Prashant,

    Please find attached the fail logs, pass logs, and power on/off stress test logs for your reference.

    At this stage, we are not able to determine the exact occurrence or root cause of this issue. However, we suspect that the problem could be related to the CPU side.

    We have observed a similar behavior earlier on SR1.0 CPU, where we faced issues while attempting to boot from eMMC. Although eMMC boot is not officially supported on SR1.0, the symptoms observed during power cycling appear to be similar, which raises concern about a possible CPU-related or boot-sequencing dependency.

    Issue Description

    During power on/off stress testing, we are observing intermittent boot failures. In some power cycles, the board boots successfully, but in many cases it fails with the error logs shown below.

    Representative Console Log Captured During Failure

    NOTICE:  bl1_plat_arch_setup arch setup
    NOTICE:  Booting Trusted Firmware
    NOTICE:  BL1: v2.12.0(release):9f56914fa-dirty
    NOTICE:  BL1: Built : 13:13:15, Nov 27 2025
    NOTICE:  BL1: dram_class: 11
    NOTICE:  lpddr4: post start - PI training status=0x27c0a000
    NOTICE:  bl1_platform_setup DDR init done
    NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    NOTICE:  BL31: v2.12.0(release):9f56914fa-dirty
    NOTICE:  BL31: Built : 13:13:15, Nov 27 2025
    NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
    ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported
    
    U-Boot SPL 2025.01-g69a2476ac276 (Nov 27 2025 - 13:22:39 +0000)
    SPL initial stack usage: 1936 bytes
    Trying to boot from MMC0
    mmc_load_image_raw_sector: mmc block read error
    Partition 1 invalid on device 0
    spl_register_fat_device: fat register err - -1
    spl_load_image_fat: error reading image u-boot.img, err - -1
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###
    

    Test Summary

    • Power on/off testing performed up to U-Boot stage

    • Total power cycles tested: 1000

    • Failure count: ~300 cycles

    • Failure nature: Intermittent / non-deterministic

    Initial Observation

    From the logs, the failure appears to occur during the execution of
    mmc_load_image_raw_sector(), where the SPL is unable to reliably read from the eMMC after power cycling. This indicates a potential power-up timing, initialization, or sequencing issue affecting MMC access during SPL.

    Support Requested

    Requesting your support to analyze this issue and advise on the following:

    • Possible MMC power-up timing or initialization concerns

    • Any required power-off time or power stabilization delays

    • Known issues related to SPL MMC boot under repeated power cycling

    • Recommended software or hardware changes to improve boot reliabilityTest-Logs.zip

    Please let us know if any additional logs, measurements, or test details are required from our side.

    Thanks & regards,
    Kumaresan G

  • Hi Kumaresan,

    Recommended software or hardware changes to improve boot reliabilityTest-Logs.zip

    In the logs attached in this ZIP file, which seems to be the latest, I see the following U-Boot version

    U-Boot 2025.01-g674977ce0b8d (Dec 17 2025 - 13:20:57 +0000)

    I could not find the commit "674977ce0b8d" in the "ti-u-boot" repository so I am not sure about the U-Boot version you are using. Maybe you have added some commits of your own which is why I can't find the commit id.

    Could you please clarify the U-Boot version you are using?

    I notice the SYSFW version is "11.2.3-v11.02.03 (Fancy Rat)" which comes from the SDK v11.2 so ideally you should be using the U-Boot version from this SDK only (tag: 11.02.08).

    I think the issue could be caused by the eMMC card or the custom board's eMMC schematics. Is your schematics reviewed by TI?

    Thanks,

    Prashant

  • Dear Prashant,

    We are using TI AM62L SDK version 11.01.16.13 as the base for our custom board BSP release.

    • U-Boot version: ti-u-boot-2025.01+git

    • Board schematics: Not fully reviewed by TI at this stage

    We are observing that eMMC boot passes consistently on some boards, whereas on other boards eMMC boot fails intermittently or consistently.

    At present, we are unable to identify the exact root cause of this behavior. Hence, we request your guidance on recommended debug methods to isolate and resolve this issue.

    Since this appears to be a critical and urgent issue, your support in helping us resolve it at the earliest would be greatly appreciated.

    Please let us know if any additional information, logs, or measurements are required from our side.

    Thanks and regards,
    Kumaresan G


  • Hello,

    We are using TI AM62L SDK version 11.01.16.13 as the base for our custom board BSP release.

    There is a bit of inconsistency in this information. The log file "Dec-31-2025-09-25-09-Log.txt" present in the attached "Test-Logs.zip" shows the U-Boot version "U-Boot SPL 2025.01-g674977ce0b8d (Dec 17 2025 - 13:20:57 +0000)" while the U-Boot version in the logs attached in your responses is "U-Boot SPL 2025.01-g69a2476ac276 (Nov 27 2025 - 13:22:39 +0000)".

    These are two different U-Boot commits. The issue is seen with both so the version does not really matter but it would be good if you could review and confirm the exact baseline you are working with.

    We are observing that eMMC boot passes consistently on some boards, whereas on other boards eMMC boot fails intermittently or consistently.

    This seems to suggest some board issues. If you do not have your schematics reviewed, could you please create a separate query for the schematics review, specifically the eMMC, and see if the issue resolves after modifying the board as per the recommentations from the hardware expert (if any).

    Regards,

    Prashant