configure Linux and U-boot for another DDR3 RAM

Hi,

You'll probably need to change just the DDR setup code in U-Boot. I am not sure what you mean by disable RAM bank1. As long contiguous memory is available for Linux it should boot properly.

Regards,

Vaibhav

Hmm, maybe I should have specified my question a bit more. We are using the TMS320C6A8168 processor, and this processor have to DDR interfaces; DDR0 and DDR1, called bank 0 and bank 1. The EVM uses both banks of RAM, where each bank consists of four ICs of 8 bit each. We will only use bank 0, and thus we need to disable bank1. And instead using four ICs, we will use two ICs of 16 bit each.

I have read through some of the code in U-boot, and there is a configuration called CONFIG_NR_DRAM_BANKS in include/configs/ti8168_evm.h. This is by default 2, but when I change this to 1 u-boot fails to boot the linux kernel. I can not find the CONFIG_NR_DRAM_BANKS being used in board/ti/ti8168/evm.c, but it seems to be used in a couple of other board-implemetation files. This macro is also used in api/api_platform-arm.c.

Are there any specific steps of how configure the processor to only use the first bank?

I am new to u-boot and embedded linux, so I am bit unsure of how u-boot works internally.

Update:
I have located a setting called USE_EMIF0 and USE_EMIF1 (arch/arm/include/asm/arch-ti81xx/ddr_defs_ti816x.h). We will only use EMIF 0 (CS 0).  When setting USE_EMIF1 to zero u-boot doesn't boot.

From your description it sounds like you need to change the LISA mappings done in U-Boot. The default behaviour is to enable interleaving across both the memory controllers. Have a look at the DMM section in the TRM to get the correct settings.

Emil Ohlsson said:

there is a configuration called CONFIG_NR_DRAM_BANKS in include/configs/ti8168_evm.h

IIRC this macro is not used anywhere. The macro that you should look for is CONFIG_TI816X_TWO_EMIF. You'll probably need to skip all the settings that is done for the second memory controller.

Emil Ohlsson said:

I am new to u-boot and embedded linux, so I am bit unsure of how u-boot works internally.

There's some good information here http://processors.wiki.ti.com/index.php/Understanding_u-boot-min_startup_for_DM814x. Its not DM8168 specific but the idea remains the same.

Emil Ohlsson said:

I have located a setting called USE_EMIF0 and USE_EMIF1 (arch/arm/include/asm/arch-ti81xx/ddr_defs_ti816x.h). We will only use EMIF 0 (CS 0).  When setting USE_EMIF1 to zero u-boot doesn't boot.

Try disabling interleaving with this.

You can even build a minimal configuration which runs out of OCMC RAM. An image running from internal RAM will help you run basic memory tests to validate the DDR settings.

$ make CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm distclean

$ make CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm ti8168_evm_min_ocmc

$ make CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm u-boot.ti

Regards,
Vaibhav

I will take a look on the DMM documentation, sound to be right place to start.

I am having trouble running the OCMC image though, it seems to freeze... I don't get any output on UART2. I'm using u-boot-2010.06-psp04.00.01.13-patch1 which comes shipped with EZSDK 05.03.01.15 using revision F of the 816X EVM. Can I troubleshoot this in any way?

Regards,
Emil

The OCMC image has minimal dependencies so i would expect it to just boot. I guess time to bring out the JTAG and single-step the init code.

Problem is, I don't have access to JTAG for the 816X EVM. So I really need to start coding from a working bootloader. Is this a known problem that the OCMC-build of u-boot doesn't work on the EVM? Is there a repository where I could find newer/older versions of the PSP u-boot to try with the EVM?

Is there some fast/easy way to get JTAG access to the EVM? I have an OpenOCD that I have used to debug a Cortex M3 processor, could I perhaps use this?

Does the OCMC build require some specific boot procedure? Such as SD card or something like this? Currently I am downloading U-boot via Ethernet using boot mode MBOOT[4:0] = 0b00111, and then hoping to interact, or at least debug output, using UART2.

Thanks,
Emil

OK, now I have borrowed a JTAG (XDS510+ USB), and it seems like the processor get stuck in a dead loop called "Pre-fetch abort exception" (see page 2249 in sprugx9). What should I expect the ocmc build to do? Since I am building one of the standard targets of u-boot shipped with the EZSDK and trying to run it one the intended EVM I would really expect some kind of output or feedback from the EVM.

I'm on a very tight deadline, so any help is greatly appreciated!

Thanks,
Emil

So, with a JTAG in hand here's how i would go about it...

1. Connect to A8 core in CCS
2. Load a GEL file to initialize the OCMC RAM. You can probably get one from the PSP package. All that you probably want to do from the GEL is write to the OCMC CLKCTRL register to enable access to it.
3. Build OCMC version of U-Boot
4. Load the U-Boot ELF file obtained in the step above to the A8 core via CCS
5. Set the processor state to ARM mode and manually modify the PC of A8 to 0x40410000. This is needed because 0x40410000 is where the file expects to be loaded. If every thing has gone as expected you should see a branch instruction @ 0x40410000.
6. Now either single step or just issue a free run.

1. If you are lucky you'll get a U-Boot prompt over UART2 and you can move to the next step
2. If you are not so lucky you'll need to set breakpoints at different locations of U-Boot code to trace what's going wrong. Continue till you get the prompt.

• Once you get a prompt you can use mtest to check the memory configuration. Try out different memory setting till the memory setup is sorted out.
• Implement all the fixes in a normal U-Boot image, say SD boot and then hope for the best :)

I guess the above steps are more than sufficient to get the board to boot.

Regards,

Vaibhav

Nice to know that you have things sorted out now.

Regards,

Vaibhav