Part Number: AM623
Other Parts Discussed in Thread: SYSCONFIG, SK-AM62B-P1
Hi,
we have some custom board with am623 and 8Go DDR4. u-boot used is from SDK 11.0.15
when booting from the same SD card some of this board are booting and working fine but others are stuck in an early stage in the SPL :
U-Boot SPL 2025.01 (Jan 13 2026 - 17:47:24 +0100)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
Changed A53 CPU frequency to 1000000000Hz (S grade) in DT
SPL initial stack usage: 13424 bytes <<<<<<<<<<<< stuck here
whene looking at DDR controller with scope on RESET and CKE signal we saw that CKE was not going high but when zooming it seems that controller is trying to start after ~600us (glitch at 42 mV)

when we look at a normal board that is able to boot we saw that indeet the CKE is released 600us after reset is is released
we measure also DDR power during the reset of the board that can't boot :
vddr_core : 855 mV
VPP: 2.51 V
vddrefca : 603mV
vdds_ddr : 1.205V
and no glitch or instability is visible during this period,
clock used is 800Mhz and is present at reset
can you help us on this topic,
thank you
best regards







