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SPI Sitara pin configuration problem

Hi all,

    I'm porting Android OS to board based on Sitara AM3984, I'm using Android-Linux port for TI816 EVM board as a reference and starting point for my system. I've added spidev driver to my kernel, because I need to drive SPI from user applications. Driver is added to system without  any problem, it appears in kernel devices (/dev/spidev1.0 for my system). When I tried to test SPI with spidev_test program, that is a part of kernel documentation folder, I get clock and chip select to appear on scope, MOSI data is present on SPI_D[1] pin!

Then I looked at schematic of EVM and my board:

On EVM board SPI_D[0] is connected to MISO line and SPI_D[1] is connected to MOSI line. In my hardware system configuration, pin SPI_D[0] is set to MOSI and pin SPI_D[1] is connected to MISO. So there is a difference on two systems. After looking in technical reference manual, Sitara register MCSPI_SYST has configuration bits that determine which pin is going to be input and ouput (SPIDATDIR1 and SPIDATDIR0).

I have set those bit values to SPIDATDIR1=input and SPIDATDIR0=output! But after I rebuilt the kernel and tried spidev_test program once again the result is same. Output data (MOSI) is appearing on SPI_D[1] pin and not on the SPI_D[0] pin like I wanted it to be! Because in my system, regarding data lines, I have reverse situation in comparison with TI816 EVM board.

I looked in to rest of the code (mux settings, device.c, board-ti8186evm.c etc.) but I haven't found anything that seems to overwrite those pin setting for SPI peripheral! Can anybody give me clue regarding this problem?? How can I set SPI_D[0] = MOSI and SPI_D[1] = MISO??

Kind regards,

Srdjan

  • Hi,

    one more question, is it possible, maybe, to set MCSPI registers when krenel is booted? With command 'devmem2 REG_ADDR'. I tried to read MCSPI_SYST reg but I get this output:

    /dev/mem opened.Unhandled fault: Precise External Abort on non-linefetch (0x1018) at 0x401a2124

    Memory mapped at address 0x401a2000.
    Unhandled fault: Precise External Abort on non-linefetch (0x1018) at 0x401a2124
    [1] + Stopped (sUnhandled fault: Precise External Abort on non-linefetch (0x1018) at 0x401a2124
    ignal)        devmem2 0x48030124
    #
    [1]   Bus error               devmem2 0x48030124

    Maybe the SPI register are not mapped at all, so I'm not able to read or write to them.

    Any help, please???

    Srdjan