OMAP-L138 EMIFA Asynchronous Memory Interface

HRi

Other Parts Discussed in Thread: OMAP-L138

Hi,

What is the OMAP-L138 minimum Write/Read Cycle Time of the EMIFA Asynchronous Memory Interface? I went over the data-sheet and couldn't get the number...

Thanks,

over 13 years ago

0 B.C. over 13 years ago

TI__Genius 16906 points

HR,

The EMIFA accesses are broken up in to SETUP, STROBE, and HOLD periods (or phases). The duration of each of these periods is a programmable number of EMIFA clock cycles. See the OMAP-L138 Technical Reference Manual for details of the periods, and see the data manual for the minimum EMIFA clock cycle.

Regards,

Brad

0 HRi over 13 years ago in reply to B.C.

Guru 10750 points

Brad,

Many Thanks,

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OMAP-L138 EMIFA Asynchronous Memory Interface