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I2C[3] on 8148

Hi ALL,

            We have a test case of I2C0 on 8148 EVM,it works well.Now we need to use I2C3(pin num:AH6,I2C[3]_SDA;AG6,I2C[3]_SCL,which is corresponding to PINCNTL68,PINCNTL69 )on our customized board with 8148,i modified the original test case for I2C0 on EVM to fit for I2C3,but i failed with I2C write&read,even got nothing from I2C3 with scope.

what i changed:

1>enable the clock for I2C3 in CCS gel scripts

write CM_ALWON_I2C_1_CLKSTCTRL with 0x2

2>set pinmux with I2C3

           //I2C3_SDA
#define PINCNTL68 (*(volatile unsigned int*)(0x4814090C))
        //I2C3_SCL
#define PINCNTL69 (*(volatile unsigned int*)(0x48140910))

        PINCNTL68 = 0x00060020;
        PINCNTL69 = 0x00060020;

3>change I2C BUS Num from 0 to 3,that's changing the I2C0 base address 0x48028000 to I2C3 base address 0x4819E000

Did i miss anything?

xiang,

Regards,

  • Hi Xiang,

    I am facing similar issue, did you solved this.?

    Regards,

    Manoj

  • Manoj,

    Can you try read/write the I2C3 registers, after you enable the i2C3 clock from the PRCM, are you able to read/write?

    BR
    Pavel

  • Hi Pavel,

    I2C3 clock is enabled, i could able to do read/write from u-boot. but on M3VPSS firmware read/write using "PSP_i2cTransfer" function hangs and i could not see any signal on i2c lines, and  on same firmware "PSP_i2cProbe"  function can list the available slave device on I2C3 bus.

    Please look at this link.

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/386917.aspx

    Regards,

    Manoj

  • Manoj,

    selvam mk said:
    I2C3 clock is enabled, i could able to do read/write from u-boot. but on M3VPSS firmware read/write using "PSP_i2cTransfer" function hangs and i could not see any signal on i2c lines, and  on same firmware "PSP_i2cProbe"  function can list the available slave device on I2C3 bus.

    I am not familiar with that firmware, but you can check if this firmware disable/gate the I2C3 clock and/or reconfigure the I2C3 registers and pins. I mean you should check if this firmware does not overwrite your u-boot settings regarding I2C3.

    BR
    Pavel

  • Hi Pavel,

    Thanks for the reply.

    After loading firmware i have checked the clk registers and pin mux registers. and using PSP_i2cProbe function i could able to see the available I2C slave device available on bus 3. only read/write is the problem.

    Regards,

    Manoj

  • Manoj,

    selvam mk said:
    After loading firmware i have checked the clk registers and pin mux registers. and using PSP_i2cProbe function i could able to see the available I2C slave device available on bus 3. only read/write is the problem.

    See if the below e2e threads will be in help:

    http://e2e.ti.com/support/embedded/linux/f/354/t/151018.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/195023.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/245550.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/191819.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/152894.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/199661/742089.aspx#742089

    BR
    Pavel

  • xiang71740 said:
    PINCNTL68 = 0x00060020;
            PINCNTL69 = 0x00060020;

    You're changing bit 19 (slew rate / reserved) from its reset value (1 "slow" → 0 "fast") for those here, which the datasheet explicitly forbids.

    Note that the control module fully supports 8- and 16-bit writes, so if you only want to change the pinmux you can just perform a byte write to avoid changing the upper bits.  If you also want to make sure bits 16-18 are set correctly you should do a read-modify-write or check in advance what the reset value of bit 19 for those pins is.  Since the boot ROM is known to accidently overwrite some of those settings too (see errata) and documentation isn't always bug-free either, I've captured the pinmux state in cold "wait-in-reset" state (before bootrom executes) and included it in my Centaurus pins spreadsheet.

    Still, afaik that could only mess up I/O timing, so the main issue remains unexplained.

    You mentioned the driver code runs on one of the ducati cortex-M3s, have you tried to attach to it via JTAG and see if you can access the peripheral registers there?  (Mostly just to be check the MMUs are configured right to also cover the address where I²C 3 is located, which is much higher than I²C 0)

    Edit: never mind, you mentioned that you could probe the device from the cortex-M3. Then I'm not sure where to look for the issue, sorry.

  • selvam mk said:
    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/386917.aspx

    Ah, indeed I²C 2 and 3 irqs are only available to Ducati through the cross-bar.

    If this hasn't been configured yet then means you need to pick one of the 64 irqs (any one that's not already in use will do) and configure its irq mux to 5 (in case of I²C 3).  You can find the addresses of the mux registers (one byte per irq) and possible mux values in my Centaurus IRQs spreadsheet or in the TRM (but I personally think my spreadsheet is more convenient, otherwise I wouldn't have made it obviously).

    Edit: fixed broken link