TDA4VM: C7X invalid assembly instruction

Zbigniew Dubil

Prodigy 10 points

Part Number: TDA4VM

Compiler generates invalid instructions. My code looks like (simplified):

#pragma UNROLL(1)

#pragma MUST_ITERATE(8, 64, 4)

for (int32_t x = 0; x < width; x += 64)

{

__vstore_pred_packh_2src( predicateVar , vout_result_pu8, in0, in1);

++vout_result_pu8;

}

This causes following errors in generated assembly:
ERROR! at line 763: [E0003] Invalid instruction
|| VSTPBPACKH .D2X P0,VB1:VB0,*D2++(64) ; [A_D2] |132| <0,17> ^

However when I enforce merging instructions by adding:

__vstore_pred_packh_2src( predicateVar , vout_result_pu8, in0, in1);
// complier can't merg packing and incrementation

volatile int i=0;

if(i==0)

{

++vout_result_pu8;

}

Then it works correclty. This code was likely compiled previously (*vout_result_pu8++;) with ti-cgt-c7000 version 4, so with just dummy read out from that location.
Currently with ti-cgt-c7000 version 5 it olny compiles with this volatile trick.
What could be the root cause?

4 months ago

0 Sivadeep P R 4 months ago

TI__Expert 8650 points

Hi,

Let me try this from my side and get back to you.

Regards,

Sivadeep

0 Ben Thomas 3 months ago

TI__Intellectual 1420 points

Hi,
I have tried this intrinsics from my end without volatile and was able to build on CCS with CGT TI v4.1.0.LTS and TI v5.0.0.LTS on all optimization levels.
The reference code i implemented is as follows

#include <stdio.h>
#include <c7x.h>
#include <c7x_scalable.h>
#include<iostream>

int main() {

     int32_t x;
     int32_t width =128;
    __bool64 predicateVar=bool64(1);
    __char64 vout_result_pu8;
    __short32 in0 = __short32(10, 20, 30, 40, 50, 60, 70, 80,90, 100, 110, 120, 130, 140, 150, 160,170, 180, 190, 200, 210, 220, 230, 240,250, 260, 270, 280, 290, 300, 310, 320);
    __short32 in1 = __short32(1, 2, 3, 4, 5, 6, 7, 8,9, 10, 11, 12, 13, 14, 15, 16,17, 18, 19, 20, 21, 22, 23, 24,25, 26, 27, 28, 29, 30, 31, 32);
    
#pragma UNROLL(1)
#pragma MUST_ITERATE(8, 64, 4)

    for (x=0; x < width; x += 64)
     {
        __vstore_pred_packh_2src( predicateVar , &vout_result_pu8, in0, in1);
        ++vout_result_pu8;
     }
     
    for(x=0;x<64;x++){
     std::cout<<(int)vout_result_pu8.s[x]<<std::endl;
     }
     
    return 0;
 
}

I have also attached the build logs.


**** Build of configuration Debug for project trial ****
 
/home/sivadeepr/ti/ccs1280/ccs/utils/bin/gmake -k -j 8 all -O 

Building file: "../main.cpp"

Invoking: C7000 Compiler

"/home/sivadeepr/ti/ti-cgt-c7000_4.1.0.LTS/bin/cl7x" -mv7120 --include_path="/home/sivadeepr/workspace_v12/trial" --include_path="/home/sivadeepr/ti/ti-cgt-c7000_4.1.0.LTS/include" -g --diag_warning=225 --diag_wrap=off --display_error_number -k --preproc_with_compile --preproc_dependency="main.d_raw"  "../main.cpp"

Finished building: "../main.cpp"

Building target: "trial.out"

Invoking: C7000 Linker

"/home/sivadeepr/ti/ti-cgt-c7000_4.1.0.LTS/bin/cl7x" -mv7120 -g --diag_warning=225 --diag_wrap=off --display_error_number -k -z -m"trial.map" -i"/home/sivadeepr/ti/ti-cgt-c7000_4.1.0.LTS/lib" -i"/home/sivadeepr/ti/ti-cgt-c7000_4.1.0.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="trial_linkInfo.xml" --rom_model -o "trial.out" "./main.obj" "../lnk 1.cmd"  
<Linking>

"../lnk 1.cmd", line 99: warning #19014-D: undefined preprocessor symbol 'SOC'

"../lnk 1.cmd", line 99: warning #19014-D: undefined preprocessor symbol 'j784s4'

"../lnk 1.cmd", line 131: warning #19014-D: undefined preprocessor symbol 'SOC'

"../lnk 1.cmd", line 131: warning #19014-D: undefined preprocessor symbol 'j784s4'

Finished building target: "trial.out"

 
**** Build Finished ****

Regards,
Ben Eapen Thomas

Processors

Processors forum

TDA4VM: C7X invalid assembly instruction