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OMAPL138 SPI Master overrun issues

I am trying to DMA 64K bytes of data out the SPI1 CS1 Tx port.  below is the DMA Param19 set:

   // Initialize DMA PARAM19 Register values/////////
    *param19OptReg = 0;
    *param19OptReg |= EDMA_TCC_SPI1_TX_MASK | EDMA_SYNCDIM;
    *param19SrcReg = (unsigned int)(&nullTxData);

    *param19ABReg = SAMPLE_BUFFER_SIZE;    // Bcnt of ABcnt register
    *param19ABReg <<= 16;// Shift Bcnt into top 16 bits of register
    *param19ABReg |= 1;    // Add the Acnt value for the DMA

    *param19DstReg = (unsigned int)&SPI1->SPIDAT0;

    *param19BidxReg = 0;
    *param19CidxReg = 0;
    *param19CcntReg = 1;

    // Set the link register to null
    *param19LinkReg = NULL_LINK;

I also have a DMA channel set up to receive SPI1 data.  Below is the DMA Param18 set:

    *param18OptReg = 0;
    *param18OptReg |= EDMA_TCC_SPI1_RECV_MASK | EDMA_TCINTEN_MASK;
    *param18SrcReg = SPI1->SPIBUF;

    *param18ABReg = SAMPLE_BUFFER_SIZE;    // Bcnt of ABcnt register
    *param18ABReg <<= 16;// Shift Bcnt into top 16 bits of register
    *param18ABReg |= 1;    // Add the Acnt value for the DMA

    *param18DstReg = (unsigned int)sampleBuff2Ptr;

    *param18BidxReg = 1 << 16;
    *param18CidxReg = 0;
    *param18CcntReg = 1;

    // Set the link register to Param32
    *param18LinkReg = PARAM32_LINK;

I do not enable the DMAREQEN in the SPI1 register until I want to perform the DMA transfer.  The steps I am using to perform the DMA is:

    CLRBIT(SPI1->SPIDAT1, CSNR1); // Clear CS1 low to enable CS1
    while (!CHKBIT(spi->SPIBUF, RXEMPTY))
    {
        dummyRead = SPI1->SPIBUF;

    }
    SETBIT(SPI1->SPIINT, DMAREQEN);

CS0 is already set high (from init) so I dont think I am getting any data from my CS0 device.

I know that the PARAM linking works because I had the OMAP set up as a slave at first and it worked fine.  The problem that I am having is that I get data overruns and when I look at the PARAM18 linkset, the PARAM18 updated and a few bytes (about 8 or so) are gone from the new list, meaning that I have gotten more receive data then transmitted data.  I am running DSP/BIOS.  I currently have the port disconnected and I am just running the data on floating lines.  Any help would be appreciated. 

Thanks,

Will


  • Will,

    What is your SPI port connected to on the other end? Your DMA configurations on both the Tx and Rx side look fine, but I am curious about why you are linking to a different PaRAM set for the Rx event and not for the Tx event? After the first 64Kbytes are transceived the flow will stop. Perhaps I'm looking too far ahead of the problem, but I am just trying to better understand what you are attempting.

    If you look at the PaRAM18 BCNT has it decremented the same number of times as the number of new values in your sampleBuff2? Does it match the number of decrements in PaRAM19's BCNT?

    After you begin to see overrruns is the EDMA still functioning or has everything halted?

    Have you looked at the SPI bus on a scope/analyzer to determine what is going on in the system?

  • Tim,

     I am connected to a CPLD but the power to the CPLD board is not on.  I am not linking the Param set for the Tx because I want to start the DMA once a second and then transfer the data over as fast as possible.  I haven't put in the code to clear the SER bit to re-enable the DMA Tx for the next second.  THe number of ABCount decrements matches the amount sent over the DMA Tx.  Thats why I am confused.  I haven't run it more than once so I don't know if the EDMA dies or not.  I have looked at the SPI bus with an o-scope and I see the CS go low and see the clocks.  In order to switch between Chip selects, should I disable the spi port, swith the CS's and then re-enable the SPI.

    Thanks,

    Will

  • Tim,

    Found the problem.  The value put into the PARAM18 SRC address was the value of SPI1->DataBuf, not the address.  Everything seems to work. 

    Thanks,

    Will