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Unable to reach Gigabit Ethernet Switch Subsystem registers

Koray Korkmazer
Intellectual 820 points
Other Parts Discussed in Thread: CDCM61004

 Hello,

We are developing our own board with C6678 DSP inside. We are keeping our hardware design similar to the 6678 EVM. That's why we are using 6678 evm's platform library.
During bootloader process, we observed that some of our demo boards can not complete boot process. Whenever we debug the the IBL on malfunctioning boards, we saw that in the  Init_SGMII() function of platform_init procedure, the program counter traps and can not run out of it. Inside that function, it can not see the AutoNegotiation bit in MDIO as set and so remains in related while loop.
To debug the problem, we tried to write MDIO Control Register but did not managed to do it. At the end we saw that, we can not write any of the Gigabit Ethernet Switch Subsystem register by means of our application sw or even by means of Memory Browser of CCS. To see if there is also a problem about reaching other peripheral registers, we tried to write some PCIe control registers and succeed to write PCIe registers. The problem seems to occur only on Gigabit Ethernet Switch Subsystem registers.

As I said before, we are having this problem on some boards, not on all of them. We started to think that there may be a problem at DSP chips of malfunctioning  boards.
Do you have any other suggestion about the cause of this problem ?

Regards,
Koray.

  • 0
    TI__Intellectual 1880 points

    Koray,

    It sounds like the power domain for the NetCP may not be getting turned on successfully.

    I have attached a GEL file that you can use to get the status of the Power Sleep Controller Registers.

    8233.getPowerSleepControllerStatusC6678.zip

    After you run your application and notice a failure, can you please:

    1. Add the attached gel file (In the CCS Debug window, go to Tools-->GEL Files, then in the GEL window, right click and select "Load GEL ...")
    2. Run the getPowerSleepControllerStatusC6678 function (Scripts-->Power Sleep Controller --> getPowerSleepControllerStatusC6678)
    3. Send me back the output. 
    With this output, I will be able to determine any errors in the power sleep controller.

    Regards,

    Derek

  • 0 in reply to Derek Brown
    Intellectual 820 points

    Hi Derek,

    We executed your procedure for our two boards. First file is the output of malfunctioning board(SgmiiFail.txt). And second file is output for the board that has no problem(SgmiiSuccess).

    Fullscreen 0552.SgmiiFail.txt Download 
    C66xx_0: GEL Output: Beginning to print the status of the PSC registers
C66xx_0: GEL Output: 0x0x02350000,0x0x44826200
C66xx_0: GEL Output: 0x0x02350014,0x0x0B2C0000
C66xx_0: GEL Output: 0x0x02350120,0x0x00000000
C66xx_0: GEL Output: 0x0x02350128,0x0x00000000
C66xx_0: GEL Output: 0x0x02350200,0x0x00000301
C66xx_0: GEL Output: 0x0x02350204,0x0x00000301
C66xx_0: GEL Output: 0x0x02350208,0x0x00000301
C66xx_0: GEL Output: 0x0x0235020C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350210,0x0x00000301
C66xx_0: GEL Output: 0x0x02350214,0x0x00000301
C66xx_0: GEL Output: 0x0x02350218,0x0x00000301
C66xx_0: GEL Output: 0x0x0235021C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350220,0x0x00000301
C66xx_0: GEL Output: 0x0x02350224,0x0x00000301
C66xx_0: GEL Output: 0x0x02350228,0x0x00000301
C66xx_0: GEL Output: 0x0x0235022C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350230,0x0x00000301
C66xx_0: GEL Output: 0x0x02350234,0x0x00000301
C66xx_0: GEL Output: 0x0x02350238,0x0x00000301
C66xx_0: GEL Output: 0x0x0235023C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350300,0x0x00000001
C66xx_0: GEL Output: 0x0x02350304,0x0x00000001
C66xx_0: GEL Output: 0x0x02350308,0x0x00000001
C66xx_0: GEL Output: 0x0x0235030C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350310,0x0x00000001
C66xx_0: GEL Output: 0x0x02350314,0x0x00000001
C66xx_0: GEL Output: 0x0x02350318,0x0x00000001
C66xx_0: GEL Output: 0x0x0235031C,0x0x00009001
C66xx_0: GEL Output: 0x0x02350320,0x0x00000001
C66xx_0: GEL Output: 0x0x02350324,0x0x00000001
C66xx_0: GEL Output: 0x0x02350328,0x0x00000001
C66xx_0: GEL Output: 0x0x0235032C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350330,0x0x00000001
C66xx_0: GEL Output: 0x0x02350334,0x0x00000001
C66xx_0: GEL Output: 0x0x02350338,0x0x00000001
C66xx_0: GEL Output: 0x0x0235033C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350800,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350804,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350808,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235080C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350810,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350814,0x0x00000A00
C66xx_0: GEL Output: 0x0x02350818,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235081C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350820,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350824,0x0x00000A00
C66xx_0: GEL Output: 0x0x02350828,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235082C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350830,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350834,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350838,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235083C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350840,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350844,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350848,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235084C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350850,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350854,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350858,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350A00,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A04,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A08,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A0C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A10,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A14,0x0x00001100
C66xx_0: GEL Output: 0x0x02350A18,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A1C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A20,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A24,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A28,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A2C,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A30,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A34,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A38,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A3C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A40,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A44,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A48,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A4C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A50,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A54,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A58,0x0x00000103
C66xx_0: GEL Output: PSC register printing completed successfully.

    Fullscreen 2335.SgmiiSuccess.txt Download 
    C66xx_0: GEL Output: Beginning to print the status of the PSC registers
C66xx_0: GEL Output: 0x0x02350000,0x0x44826200
C66xx_0: GEL Output: 0x0x02350014,0x0x0BEF0000
C66xx_0: GEL Output: 0x0x02350120,0x0x00000000
C66xx_0: GEL Output: 0x0x02350128,0x0x00000000
C66xx_0: GEL Output: 0x0x02350200,0x0x00000301
C66xx_0: GEL Output: 0x0x02350204,0x0x00000301
C66xx_0: GEL Output: 0x0x02350208,0x0x00000301
C66xx_0: GEL Output: 0x0x0235020C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350210,0x0x00000301
C66xx_0: GEL Output: 0x0x02350214,0x0x00000301
C66xx_0: GEL Output: 0x0x02350218,0x0x00000301
C66xx_0: GEL Output: 0x0x0235021C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350220,0x0x00000301
C66xx_0: GEL Output: 0x0x02350224,0x0x00000301
C66xx_0: GEL Output: 0x0x02350228,0x0x00000301
C66xx_0: GEL Output: 0x0x0235022C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350230,0x0x00000301
C66xx_0: GEL Output: 0x0x02350234,0x0x00000301
C66xx_0: GEL Output: 0x0x02350238,0x0x00000301
C66xx_0: GEL Output: 0x0x0235023C,0x0x00000301
C66xx_0: GEL Output: 0x0x02350300,0x0x00000001
C66xx_0: GEL Output: 0x0x02350304,0x0x00000001
C66xx_0: GEL Output: 0x0x02350308,0x0x00000001
C66xx_0: GEL Output: 0x0x0235030C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350310,0x0x00000001
C66xx_0: GEL Output: 0x0x02350314,0x0x00000001
C66xx_0: GEL Output: 0x0x02350318,0x0x00000001
C66xx_0: GEL Output: 0x0x0235031C,0x0x00009001
C66xx_0: GEL Output: 0x0x02350320,0x0x00000001
C66xx_0: GEL Output: 0x0x02350324,0x0x00000001
C66xx_0: GEL Output: 0x0x02350328,0x0x00000001
C66xx_0: GEL Output: 0x0x0235032C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350330,0x0x00000001
C66xx_0: GEL Output: 0x0x02350334,0x0x00000001
C66xx_0: GEL Output: 0x0x02350338,0x0x00000001
C66xx_0: GEL Output: 0x0x0235033C,0x0x00000001
C66xx_0: GEL Output: 0x0x02350800,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350804,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350808,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235080C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350810,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350814,0x0x00000A00
C66xx_0: GEL Output: 0x0x02350818,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235081C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350820,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350824,0x0x00000A00
C66xx_0: GEL Output: 0x0x02350828,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235082C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350830,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350834,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350838,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235083C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350840,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350844,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350848,0x0x00001F03
C66xx_0: GEL Output: 0x0x0235084C,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350850,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350854,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350858,0x0x00001F03
C66xx_0: GEL Output: 0x0x02350A00,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A04,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A08,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A0C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A10,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A14,0x0x00001100
C66xx_0: GEL Output: 0x0x02350A18,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A1C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A20,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A24,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A28,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A2C,0x0x00001103
C66xx_0: GEL Output: 0x0x02350A30,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A34,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A38,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A3C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A40,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A44,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A48,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A4C,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A50,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A54,0x0x00000103
C66xx_0: GEL Output: 0x0x02350A58,0x0x00000103
C66xx_0: GEL Output: PSC register printing completed successfully.

    The only difference between these two files seem to be at the second line which is:

    C66xx_0: GEL Output: 0x0x02350014,0x0x0B2C0000 (For Malfunctioning board)
    C66xx_0: GEL Output: 0x0x02350014,0x0x0BEF0000 (For true functioning board)

    Also, we have seen one another issue for this problem.
    The 312.5 Mhz LVDS clock coming from PLL (cdcm61004) is fed to DSP through 100nF AC coupling capacitors as indicated in the user guides. The clock on the DSP side seems to be as follows :

     

    If we replace 100nF AC coupling capacitors with 0 ohm resistor (i.e dc couple the clock line to the DSP), the signal shape becomes as follows :

     

    The dc coupling the clock line gives a better shape, but we can not understand the signal shape if we ac couple the SGMII clock lines.

    Both functioning and nonfunctioning boards have the same clock shapes.
    Does it make so much difference? Does this problem may be related with this issue?

    Best regards

  • 0 in reply to Koray Korkmazer
    Intellectual 820 points

    Hi Derek,

    We resolved the problem.
    The cause of the problem was the LVDS output of PLL(cdcm61004). When we changed the output from LVDS to LVPECL, the waveform of the clock has been in a good shape as we expected. Then we could read and write the NETCP registers with no problem.

    But we still have no idea about why the LVDS output of PLL(cdcm61004) has such a bad signal shape.

    Regards,
    Koray.

     

     

     

  • 0 in reply to Koray Korkmazer
    TI__Intellectual 1880 points

    Koray,

    I am glad to hear that your setup is working now.

    Was 312.5 MHz clock that you were showing in the scope captures the input for the SGMII SerDes PLL? Did you make any other changes to your setup?

    Although the SGMII SerDes input clock could prevent the SGMII and SerDes interfaces from working properly, I am surprised that it would have an effect on your ability to access the NetCP registers. The NetCP registers should be using a different clock.

    Regards,

    Derek

    If you need more help, please reply back. If this answers the question, please click  Verify Answer , below.