Part Number: DRA821U
Other Parts Discussed in Thread: DRA821, PCM3168
Hello,
A student who is currently working with a product recently bought from TI (Jacinto 7 + DRA821) is having the following issue:
I am currently working with the Jacinto 7 DRA821 and J7200 RTOS SDK v11.01, modifying the MCASP_DeviceLoopback example to enable physical audio input and output. However, I am facing issues initializing the audio codec.
This are the modifications I've made and the current status of the system:
Base code: Disabled DEVICE_LOOPBACK in audioSample.io.c
Porting: Since J7200-specific codec examples are limited, I am using the J721S2 implementation as a reference for I2C_CodecInit() and Board_pcm3168Config().
The initialization fails at the very first register write attempt within Board_pcm3168Config(). The function returns a status error during the following loop:
for(regCount = 0; regCount < 31; regCount++) {
boardStatus = Board_pcm3168RegWrite(handle, slaveAddr, pcmConfigs[regCount][0], &(pcmConfigs[regCount][1]));
if(BOARD_SOK != boardStatus) return boardStatus; // Fails here on regCount 0
}
I have tested the system iteratively, both with and without each of these modifications. Regardless of the combination of changes, the result is always the same: "I2C communication failed with codec". This suggests that a fundamental step to activate the I2C bus or power the codec is still missing.
Also I have a concern about the reference Clock, user's guide manual mentions AUDIO_EXT_REFCLK2 as the source for the codec's SCKI. However, in the J7200 code, I only see options for AUDIO_EXT_REFCLK1, and I haven't found a way to switch it for this specific SoC.
