TMS320C6455ZTZ no longer available in Lead-free?!

I think the intent was to mark all c6455 devices as NRND (not recommended for new designs).  You could use a newer device like c6457 (though that one is getting "old" too) or something really new like c6671.  The ZTZ package is a lead-free package and is still available.  To be clear, NRND devices are still available for order and most likely will continue to be available for order for many years to come.  We generally mark devices as NRND for technical support reasons, i.e. it's difficult to provide deep technical support for every device we've ever sold.  In order to try to keep customers up to date we eventually mark devices as NRND to encourage customers to migrate to newer devices.  That makes it a little easier for TI to provide solid technical support and generally provides a cost advantage to the customers (newer devices being better/cheaper).

Now, for a question concerning the errata:

Customer found that on one board L2 internal memory is failing. After they wrote SW to test L2 memory, they were able to find exactly failing location of L2 memory.
Later, they found that TI issued errata, describing this problem. Description is given on page 13 of Sillicon Errata for this DSP (sprz234r.pdf):

"2.1.16 AEA3 Must be Tied High with a 1-kΩ Resisitor if Power is Applied to the SRIO Supply Pins

The AEA3 pin must be pulled up at device reset using a 1-kΩ resistor if power is applied to the SRIO
supply pins. Failure to do so may occur in L2 memory errors and Die-ID not being read correclty. If the
SRIO peripheral is not used and the SRIO supply pins are connected to VSS, the AEA3 pin must be
pulled down to VSS using a 1-kΩ resistor."

In their system, SRIO supply pins are tied to GND and have 1K pullup resistor. Because of this, they are seeing L2 memory errors.
If they tie AEA3 pin to pulldown resistor, they do not have L2 memory errors. 

They would like to know more about behavior of DSP when L2 memory errors are present. This is because they have manufactured several boards where L2 memory error may be present (SRIO supply pins are tied to GND and they have 1K pullup resistor).

1) Is L2 memory error always present in this configuration?

2) Is it intermittent in nature? In other words, is it possible that at power-up of DSP, there are no L2 memory errors, but after X hours, errors will start to appear?

3) What about longer periods of time (months, years)?

4) If they have a system with the incorrect configuration (pullup when SRIO supply is tied to GND), and they test L2 memory at power on and find no errors, is it possible that an error could develop during system operation?

5) With the incorrect configuration, what is the expected failure rate?

6) Is there a software workaround for the devices in the field-- maybe they can set some undocumented register to override the strap?

Thank you, in advance.

Scott Kerstein said:

1) Is L2 memory error always present in this configuration?

2) Is it intermittent in nature? In other words, is it possible that at power-up of DSP, there are no L2 memory errors, but after X hours, errors will start to appear?

3) What about longer periods of time (months, years)?

4) If they have a system with the incorrect configuration (pullup when SRIO supply is tied to GND), and they test L2 memory at power on and find no errors, is it possible that an error could develop during system operation?

I've done some digging around for more info on this issue.  As best I can tell, a given device should always fail or never fail.  Is that consistent with your observations?

Scott Kerstein said:

5) With the incorrect configuration, what is the expected failure rate?

I don't have an exact number, but it should be a small number of devices.

Scott Kerstein said:

6) Is there a software workaround for the devices in the field-- maybe they can set some undocumented register to override the strap?

No, the only way to fix a failing device is to pull up AEA3.

Thanks for the quick response.

Customer hasn't seen this yet in the field, only read about it in the errata and wanted to safe guard against anything happening.