Part Number: AM2432
Hi TI Experts,
Customer has SOP AM2432. They are going to add the cable redundancy topology loopback feature soon, you could refer to the following details.
https://infosys.beckhoff.com/english.php?content=../content/1033/ethercatsystem/2474143371.html&id=
However, customer found that previously there was another customer below, who incorrectly connect in a reverse way and having DC sync about 680ns delay. My customer thinks that, although this situation should be avoid, if they later on implement the redundancy topology loopback feature, and if the link breaks, the rest part will act
as revert insertion state, which could be in the same situation as the followinng thread. And in the following thread, you could see that with just two axes, the Sync0 offset already reach to about 1 µs, nearly surpassing the <1 µs synchronization claimed by EtherCAT DC. Customer has a great concern on it.
Hence, could you help test the standard cable redundancy topology on your end and measure if there is any obvious delay if there is link break happens to address customer's concern.
Customer is going to use the MainDevice Port 0 & Port 1.
Thanks,
Kevin
