Part Number: AM6442
Other Parts Discussed in Thread: TMDS64EVM
Dear TI team,
I was trying to boot a (custom) AM64x in DEV BOOT mode and initialize it using CCS, an XDS110 and the load_dmsc_hs_fs.js from MCU+ SDK 11.00, and that constantly failed. Trying the same on a TMDS64EVM worked just fine.
I manually went through the steps performed by the load_dmsc_hs_fs.js script and noticed that the R5f was in a slightly different state on the custom board.
On the custom board, the R5f was always in Thumb mode, and "Thumb exception enable" bit (TE) in the system control register (SCTLR) was set. After clearing Thumb mode back to ARM mode and with a breakpoint on the entry point I was able to manually load the sciclient_ccs_init.release.out binary on the custom board, too.
It took me a while to realize that the difference was due to the state of the BOOTMODE[8] pin. With BOOTMODE[8] high, the EVM behaves the same, i.e. the R5f comes up in Thumb mode, and the load_dmsc_hs_fs.js script fails. After switching BOOTMODE[8] to low, the script succeeded on the custom board, too.
According to the TRM, BOOTMODE[8] is reserved in DEV BOOT mode, and reserved/unused pins should be pulled high or low, but not floating, i.e. as if they're "don't care". It seems that isn't true for BOOTMODE[8] in DEV BOOT mode.
Is this expected behavior? Is this documented somewhere, and I just missed it? Can you explain how that pin is used in DEV BOOT mode? Is there any other functionality behind that pin, or merely a non-useful reset value for TEINIT (which sets the default for SCTRL.TE, which would explain why the core comes up in Thumb mode)?
Best Regards,
Dominic
