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AM62D-Q1: LPDDR4 Device Density vs. DDRSS Configuration

Colb Uhlemann
Prodigy 50 points

Part Number: AM62D-Q1

I am working on an embedded audio processing system built around AM62D. The system is designed to use 4Gb (512MB) of LPDDR4 memory. Can I use an 8Gb memory IC instead and operate the system without making any changes to the software or DDR configuration? What about if the reverse were true, where a 4Gb part is placed and the controller is set to 8Gb density (operating system still only using 4Gb)? I would like to better understand how changing the configured density affects the behavior of the controller (if at all).

  • 0
    TI__Guru* 96041 points

    Hi Colb, any custom board will require a DDR configuration change.  This can be achieved with the DDR register configuration tool: https://dev.ti.com/sysconfig/?product=Processor_DDR_Config&device=AM62Dx

    The tool will default to the configuration for the EVM, which has 32Gb LPDDR4.  You shouldn't have to do many changes to the default, other than changing the density and possibly termination and drive strength settings based on your board design.  Instructions are in the README link in the tool

    Regards,

    James 

  • 0
    Prodigy 50 points

    Hi James, thanks for your reply. We do already have a custom DDR config in place for this board. I am interested in understanding how the system behaves when the DDR config does not match the density of the connected memory. From my perspective, it would be convenient to be able to source memory from multiple vendors at multiple different densities using only one DDR configuration. I don't have enough LPDDR4 expertise to reason out whether this would be a good idea or not.

  • +1 in reply to Colb Uhlemann
    TI__Guru* 96041 points

    Hi Colb, most of the time customer would use multiple vendor's memories with the same density, and many times they can come up with a common config across all vendors that works. 

    If you are thinking about different densities, that is a little more complicated because there is address mapping that is configured in the controller.  However, i think it may work, but you would encounter aliasing issues when moving to a smaller memory.  For example, if you configure for 4GB, and move to 2GB, the upper 2GB in the map would be repeated.  As long as your software realizes that, you should be ok.  I think as long as you configure for the largest memory, the smaller density ones should still work  

    It is not something that we have physically tried, but i think technically it would work.  As a sanity check, i would recommend you experiment and put samples of different densities on the board to see if the same config would work.  I can help you with the debug if needed.   

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 50 points

    Thanks for the extra detail, James. Using a 4Gb or 8Gb part with an 8Gb configuration and software only using 4Gb appears to be stable from my testing so far. I appreciate the insight on this unconventional request... we are being forced to consider some extra ~creative~ options due to market constraints.

  • 0 in reply to Colb Uhlemann
    TI__Guru* 96041 points

    Ok, good to know.  Thanks for the feedback.  

    Regards,

    James