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About uPP throughput of OMAPL138 which described "Introduction to uPP" on Wiki

RY9983
Guru 10570 points
Other Parts Discussed in Thread: OMAPL138

Hello

I read the "Introduction to uPP" on Wiki.
http://processors.wiki.ti.com/index.php/Introduction_to_uPP#Throughput_Estimates

It describes that the theoretical numbers throughput of uPP is defferent from realistic numbers.
I think that the uPP's transfer protocol is simple, and it does not need some packet information(Header, ID..).
And, it can transfer data with clock.

 - Why the realistic numbers is defferent from theoretical?
   (Is it related to the performance of EDMA?)

I would like to use VPIF on OMAPL138.
VPIF's spec is support up to 75MHz pclk.

 - If I use VPIF as 8bit, 75MHz, 1ch, Is the realistic number of spec lower than 75MHz?

Best regards,
RY

 

  • 0
    TI__Expert 8890 points

    RY,

    The "realistic" throughput numbers are intended to reflect the difficulty of sustaining uPP transfers at the maximum clock rate in a typical application.  There are several factors to consider:

    1. Small intervals between successive uPP transfers
    2. Handling ongoing interrupts efficiently
    3. Keeping the "next" transfer queued up 100% of the time
    4. Processing that needs to be applied to incoming/outgoing data
    5. System loading (other peripheral activity, etc.)

    Some of these issues can be minimized with appropriate design choices, so the "realistic" numbers may be somewhat conservative for applications that are dedicated to maximizing uPP throughput.