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AM5728: using high resolution timer as clock source

Michael Fainstein
Intellectual 400 points

Part Number: AM5728

using SDK 11 (ti-processor-sdk-linux-rt-am57xx-evm-11_01_02_01-Linux-x86-Install.bin), AM57xx-EVM, kernel 6.12.

I see that /sys/devices/system/clocksource/clocksource0/available_clocksource shows only 32k_counter.

I need higher resolution. How can I define some timer to be clock source?

Thank you,

Michael

  • 0
    TI__Mastermind 37886 points

    Hello Michael,

    See if the following FAQ can be of use to you: https://ete.ti.com/f/791/t/1561212

    -Josue

  • 0
    Intellectual 400 points

    Hello Josue,

    This FAQ gave me only a hint on how to switch from 32k_counter to dmtimer / timer12. However, this timer is running at 32k frequency. How can I use timer that runs at 192M?

    Thank you,

    Michael

  • 0 in reply to Michael Fainstein
    TI__Mastermind 37886 points

    Michael,

    I made the following patch and I can now see the following timer as my clock source:

    cat /sys/devices/system/clocksource/clocksource0/available_clocksource
dmtimer 
root@am57xx-evm:~# cat /sys/devices/system/clocksource/clocksource0/current_clocksource  
dmtimer
able via sysfs":~# cat /sys/devices/system/clocksource/clocksource0/clocksource0/rating 2>/dev/null || echo "Rating not avaia
Rating not available via sysfs
root@am57xx-evm:~# dmesg | grep -i "clocksource"
[    0.000000] TI gptimer clocksource: always-on /ocp/interconnect@4ae00000/segment@10000/target-module@8000
[    0.000000] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58295017589499 ns
[    0.153663] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.284511] clocksource: Switched to clocksource dmtimer
root@am57xx-evm:~#   dmesg | grep "20000000 Hz"
[    0.000305] TI gptimer clockevent: always-on 20000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@32000
[    0.001769] TI gptimer percpu-dmtimer: 20000000 Hz at /ocp/interconnect@48800000/segment@0/target-module@2c000
[    0.002043] TI gptimer percpu-dmtimer: 20000000 Hz at /ocp/interconnect@48800000/segment@0/target-module@2e000
root@am57xx-evm:~# echo "Testing timestamp resolution..."
Testing timestamp resolution...
root@am57xx-evm:~# for i in 1 2 3; do date +%s.%N; done
1748554770.446655919
1748554770.450865033
1748554770.455165649
root@am57xx-evm:~#

    Patch:

    diff --git a/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi
index f08a1c54c..ebcdb2344 100644
--- a/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi
@@ -10,6 +10,7 @@
 #include "dra74-ipu-dsp-common.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/dra7.h>
 
 / {
        compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
@@ -646,4 +647,20 @@ &pruss2_mdio {
        status = "disabled";
 };
 
+/* Configure timer2 as high-resolution clocksource */
+&timer2_target {
+       ti,no-reset-on-init;
+       ti,no-idle;
+};
+
+&timer2 {
+       ti,timer-alwon;
+       assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER2_CLKCTRL 24>;
+       assigned-clock-parents = <&timer_sys_clk_div>;
+};
+
+&counter32k {
+       status = "disabled";
+};
+
 #include "dra7-ipu-common-early-boot.dtsi"
diff --git a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
index 57efd480a..1aac31941 100644
--- a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
@@ -1171,7 +1171,7 @@ uart3: serial@0 {
                        };
                };
 
-               target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
+               timer2_target: target-module@32000 {                    /* 0x48032000, ap 5 3e.0 */
                        compatible = "ti,sysc-omap4-timer", "ti,sysc";
                        reg = <0x32000 0x4>,
                              <0x32010 0x4>;

    Best,

    Josue

  • 0 in reply to Josue Zamitiz-Ayala
    Intellectual 400 points

    Hello Josue,

    How can I change dmtimer to 192MHz instead of 20MHz?

  • 0 in reply to Michael Fainstein
    TI__Mastermind 37886 points

    Michael,

    Have you checked that there is a 192 MHz timer in AM572x available?

    Is there no conflicts?

    -Josue

  • 0 in reply to Josue Zamitiz-Ayala
    Intellectual 400 points

    # cat /sys/kernel/debug/clk/clk_summary | grep 192000000
    dpll_per_m2x2_ck 1 5 0 192000000 0 0 50000 Y deviceless no_connection_id
    l3init-clkctrl:0008:24 0 1 0 192000000 0 0 50000 Y deviceless of_clk_get_from_provider
    l3init-clkctrl:0008:25 0 1 0 192000000 0 0 50000 Y deviceless of_clk_get_from_provider
    l3init-clkctrl:0008:0 0 1 0 192000000 0 0 50000 N 4809c000.mmc fck
    l3init-clkctrl:0010:24 0 1 0 192000000 0 0 50000 Y deviceless of_clk_get_from_provider
    l3init-clkctrl:0010:25 0 1 0 192000000 0 0 50000 Y deviceless of_clk_get_from_provider
    l3init-clkctrl:0010:0 0 1 0 192000000 0 0 50000 N 480b4000.mmc fck
    dpll_per_h12x2_ck 1 1 0 192000000 0 0 50000 Y deviceless no_connection_id
    dss-clkctrl:0000:8 2 3 0 192000000 0 0 50000 Y 58040000.target-module dss_clk
    dss-clkctrl:0000:0 1 1 0 192000000 0 0 50000 Y 58000000.target-module fck

  • 0 in reply to Michael Fainstein
    TI__Mastermind 37886 points

    Michael,

    Please read the TRM for more info:  22.2 General-Purpose Timers

    2.2.1 General-Purpose Timers Overview The device has 16 GP timers: TIMER1 through TIMER16. • TIMER1(1ms tick): has its event capture pin tied to 32KHz clock and can be used to gauge the system clock input and detects its frequency among 19.2, 20, or 27 MHz. It includes specific functions to generate accurate tick interrupts to the operating system • TIMER2 and TIMER10: (1ms tick timers): they include specific functions to generate accurate tick interrupts to the operating system Each timer (except TIMER12) can be clocked from the system clock (19.2, 20, or 27 MHz) or the 32-kHz clock. The selection of clock source is made at the power, reset, and clock management (PRCM) module level. TIMER12 can be clocked only from the internal oscillator (on-die oscillator). For more information, see Section 3.6.3.1, PRM Clock Source

    The highest frequency that can be routed is the 20Mhz signal. At least on the TI evm.

    You could probably pull other slightly higher resolution clocks on the mux of the timer,
    0x8: Selects VIDEO1_DIV_CLK 0x9: Selects VIDEO2_DIV _CLK 0xA: Selects HDMI_DIV _CLK, but this is not fully supported and you would have to try it on your own.

    I showed above how to make these changes, feel free to post any additional question if you run into issues.

    best,

    -Josue