I have a quick question to which I did not find an obvious answer in
TMS320C5515/14/05/04/VC05/VC04 DSP Serial Peripheral Interface (SPI) User's Guide (SPRUFO3) or
the TMS320C5515 data sheet (SPRS645E):
The User's Guide explains that data entering through SPI_RX and exiting through
SPI_TX are both shifted through the same SPIDAT2,SPIDAT1 shift register. But in the CMD field of the
SPICMD2, there are separate codes for initiating Read and Write.
How does the behavior of the SPI peripheral differ depending on whether Read or Write is specified?
Is SPI_TX left in a high-impedance state during read? Are zero's shifted in instead of SPI_RX during
write?
Here's why I ask:
I have at least one SPI slave device (a MCP23S17 I/O Port Expander) that requires a command and
address byte be shifted into it before it will begin to shift out read data, which must be done during the same
SPI frame. Should I specify a multi-character frame length and inititate transfer of the first character(s)
of the frame with CMD = Write, then the latter characters of the frame with CMD = Read?
I have another SPI slave device (a TMP125A Temperature Sensor) that begins examining one or two
command bits being shifted in after it has begun shifting out the results of its previous measurement, so
in this case the input timing and output timing overlap. I don't see any workaround for that.
Can someone tell me whether I can do both SPI read and SPI write on the same SPI character interval?
Dan
