Hi,
I am trying to bring up a custom AM3359 design that uses a Micron MT47H128M16-25E (x16, 2Gb) DDR2 memory.
I connected with CCS5 and a USB510 emulator and am working with the gel file supplied with the AM335x Starterware 5.0.0.2. I modified the memory configuration from the gel file to the code below for initialization and used the AM335x_EVM_Initialization() function in the gel file (we are using a 24 MHz crystal as well).
The unit gets all the way through VTP and configuring the timings, etc., but fails to see bit 3 of the EMIF_STATUS_REG (0x4C000004) get set, and transactions to the device don't seem to work. The description of this bit in the TRM is a bit vague (well, to me anyway) and I was wondering if anyone could shed some light on what that bit not getting set implies. From the TRM this bit is described as:
"DDR PHY Ready. Reflects the value on the phy_ready port (active high) that defines whether the DDR PHY is ready for normal operation."
What, exactly, is the phy_ready port?
I was also wondering if anyone could confirm that the supplied gel file should be expected to work with a AM3359development kit board.
Thanks.
-Mike
(gel file timing mods)
#define OPP100_DDR2_SDRAM_TIMING1 0x088AF551 /* 0x0666B3D6 */
#define OPP100_DDR2_SDRAM_TIMING2 0x142F31D2 /* 0x143731DA */
#define OPP100_DDR2_SDRAM_TIMING3 0x000004C7 /* 0x00000347 */
#define OPP100_DDR2_SDRAM_CONFIG 0x438056B2 //no ODT on DDR2 side
#define OPP100_DDR2_REF_CTRL 0x0000081a //266*7.8us = 2074.8 = 0x81A
