Part Number: AM62A7
Other Parts Discussed in Thread: SK-AM62A-LP
Can you let me know the steps I can use to reduce the MCU_I2C & MCU_UART response time using MCU+SDK/FreeRTOS SDK and the method to measure this time?
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Part Number: AM62A7
Other Parts Discussed in Thread: SK-AM62A-LP
Can you let me know the steps I can use to reduce the MCU_I2C & MCU_UART response time using MCU+SDK/FreeRTOS SDK and the method to measure this time?
This section describes steps to optimize the MCU_I2C & MCU_UART response time for AM62A when using OSPI NAND boot mode, The application runs on MCU R5 core and SK-AM62A-LP EVM is used for the testing.
Initialize MCU_I2C & MCU_UART module in SBL Stage-1 to avoid any dependency on DM firmware from MCU R5 application. Initialization here means enabling the LPSC gates for peripheral clocking and setting the operating frequency for configured module.
The other parameters like setting Interrupt/Polling mode, Bitrate for I2C, Baudrate for UART, peripheral instance and other parameter related to the IP which do not use DM/Sciclient calls are configured in the application stage.
| Stage | Description |
| T1 | The duration from ECU power-on until the PMIC completes power rail ramp-up and releases the SOC from reset. This timing varies by board design. |
| T2 | ROM execution Time |
| T3 | Time taken by SBL Stage-1 to boot MCU R5 core |
| T4 | Time taken by MCU R5 application to initiate the MCU_I2C start condition for data transfer. |
| Stage | Description |
| T1 | The duration from ECU power-on until the PMIC completes power rail ramp-up and releases the SOC from reset. This timing varies by board design. |
| T2 | ROM execution Time |
| T3 | Time taken by SBL Stage-1 to boot MCU R5 core |
| T4 | Time taken by MCU R5 application to initiate the MCU_UART transaction. |
1. Disable SBL prints.
2. Enable MCU_I2C & MCU_UART clock in SBL Stage-1.
Add following code in SBL Stage-1:
/* To enable MCU domain I2C */ SOC_moduleClockEnable(TISCI_DEV_MCU_I2C0, 1); /* To enable MCU domain UART */ SOC_moduleClockEnable(TISCI_DEV_MCU_UART0, 1); SOC_moduleSetClockFrequency(TISCI_DEV_MCU_UART0,TISCI_DEV_MCU_UART0_FCLK_CLK,48000000);
3. Changes in clock.c to avoid resetting MCU_I2C & MCU_UART clock when pminit() is called
Apply following patch to avoid resetting the MCU_I2C & MCU_UART clock for MCU domain.
diff --git a/source/drivers/device_manager/rm_pm_hal/rm_pm_hal_src/pm/soc/am62ax/clocks.c b/source/drivers/device_manager/rm_pm_hal/rm_pm_hal_src/pm/soc/am62ax/clocks.c
index 086b1f05..b1fadc06 100644
--- a/source/drivers/device_manager/rm_pm_hal/rm_pm_hal_src/pm/soc/am62ax/clocks.c
+++ b/source/drivers/device_manager/rm_pm_hal/rm_pm_hal_src/pm/soc/am62ax/clocks.c
@@ -3782,7 +3782,7 @@ const struct clk_data soc_clock_data[260] = {
.drv = &clk_drv_pll_16fft,
.freq_idx = AM62AX_FREQ_VALUE_PLLFRACF2_SSMOD_16FFT_MCU_0,
.data = &clk_data_pllfracf2_ssmod_16fft_mcu_0.data_pll.data,
- .flags = 0,
+ .flags = CLK_DATA_FLAG_NO_HW_REINIT,
},
[CLK_AM62AX_POSTDIV1_16FFT_MAIN_1_HSDIVOUT5_CLK] = {
.parent = {
@@ -4786,7 +4786,7 @@ const struct clk_data soc_clock_data[260] = {
1,
},
.drv = &clk_drv_div_pll_16fft_hsdiv.drv,
- .flags = 0,
+ .flags = CLK_DATA_FLAG_NO_HW_REINIT,
.type = CLK_TYPE_DIV,
.data = &clk_data_hsdiv4_16fft_mcu_0_hsdiv1.data_div.data,
},
@@ -4796,7 +4796,7 @@ const struct clk_data soc_clock_data[260] = {
1,
},
.drv = &clk_drv_div_pll_16fft_hsdiv.drv,
- .flags = 0,
+ .flags = CLK_DATA_FLAG_NO_HW_REINIT,
.type = CLK_TYPE_DIV,
.data = &clk_data_hsdiv4_16fft_mcu_0_hsdiv2.data_div.data,
},
4. Call to App_runCpus API in main.c of SBL S1 can be reordered to improve R5F0-0 boot time:
App_runCpus should be moved immediately after App_loadImages API.
5. Remove SCI Server call from the image running on MCU R5 for I2C and UART
Use modified System init in the main.c file:
void mod_system_init()
{
/* DPL init sets up address transalation unit, on some CPUs this is needed
* to access SCICLIENT services, hence this needs to happen first
*/
Dpl_init();
/* Now we can do pinmux */
Pinmux_init();
/* finally we initialize all peripheral drivers */
Drivers_uartInit();
I2C_init();
}
int main()
{
int32_t status = SystemP_SUCCESS;
// System_init();
mod_system_init();
Please note here any API call that might need SCI server services from system_init is removed, so CycleCounterP_init is also removed. If customer doesn't utilize CycleCounterP then it should be fine to remove it, if any other module is required in the MCU application then it also needs to be initialized in SBL for this.
After the above changes are done, you will have to rebuild the libraries, SBL and other applications.
MCU+SDK version: 11_01_00_16
EVM: SK-AM62A-LP
Bootmode Pin settings (OSPI NAND):
For measurement method please refer to AM62A SK EVM schematics, following pins can be used for measurements;
MCU_PORz: #28 on J8
MCU_SPI0_D1: #4 on J8
MCU_SPI0_D0: #6 on J8
MCU_I2C0_SDA: #21 on J8
MCU_I2C0_SCL: #24 on J8
MCU_UART0_TXD_CONN: #19 on J8
Approximate PMIC start-up time for the EVM is 22.5 ms, this is hardware dependent so this number might be different on a custom board.
| Stage | Description | Time(ms) |
| T1 | PMIC | 22.5 |
| T2 | ROM execution Time | 48.2 |
| T3 | Time taken by SBL to boot MCU R5 core | 56 |
| T4 | Time taken by MCU R5 application to initiate MCU_I2C start condition | 0.069 |
| T4 | Time taken by MCU R5 application to initiate the MCU_UART transaction | 0.035 |
| Total MCU_I2C response time |
127 |
|
| Total MCU_UART response time |
127 |
Below are the project for both SBL Stage1 and MCU application.
Note: To check early I2C, please remove/comment the UART related APIs and for early UART remove/comment all the I2C related APIs from the given project.
Project - Early_I2C_UART.zip
Logs from Salae logic Analyzer.
Early UART -

Early I2C -

Regards,
Tushar