Part Number: AM6422
Hello TI Team,
I am working on PCIe endpoint testing using the pci_epf_test function driver on AM64xx EVM.I have referred the following doc for testinf pcie ep functionality.
https://software-dl.ti.com/processor-sdk-linux/esd/AM64X/11_01_05_03/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/PCIe/PCIe_End_Point.html
I followed the standard configfs steps to set up vendor/device IDs, MSI/MSI-X interrupts, and linked the function to the controller. The logs show BAR0 is configured successfully, but I encounter errors related to DMA.
Steps executed:
echo 0x104c > functions/pci_epf_test/func1/vendorid
echo 0xb010 > functions/pci_epf_test/func1/deviceid
echo 2 > functions/pci_epf_test/func1/msi_interrupts
echo 2 > functions/pci_epf_test/func1/msix_interrupts
ln -s functions/pci_epf_test/func1 controllers/f102000.pcie-ep/
Kernel logs:
[ 75.861010] EPF_TEST: Using shared DDR memory
[ 75.865515] EPF_TEST: mapped DDR 0xa6000000 size 0x200000
[ 75.871011] pci_epf_test pci_epf_test.0: Failed to get private DMA rx channel. Falling back to generic one
[ 75.881690] EPF_TEST: Setting BAR0 addr=0xa6000000 size=0x200000
[ 75.887781] EPF_TEST: BAR0 configured successfully
Issue:
-
DMA channel allocation fails (
Failed to get private DMA rx channel). - Because of this, I am unable to test PCIe write/read transactions using DMA.
Request for Guidance:
-
What is the recommended way to test PCIe write/read functions using DMA on AM64xx EVM with
pci_epf_test? -
Are any DTS changes required (e.g., enabling DMA channels or IRQ configuration)?
-
Are any defconfig changes required to enable specific DMA/PCIe options?
-
Do we need driver modifications in
pci_epf_testor related DMA drivers to support this use case? -
Any reference examples or documentation for DMA‑based PCIe EP testing on AM64xx would be very helpful.
Thank you for your support.
Best regards,
Charan