AM3352: NAND replacement

Guru 10235 points

Part Number: AM3352
Other Parts Discussed in Thread: TMDXEVM3358

Hi Support Team,

Our customer is currently using the MT29F2G16ABAEAWP-AIT:E for the boot ROM of the AM3352BZCZ100.
Since this device has reached EOL, he selected the MT29F2G16ABAGAWP-AIT:G as a replacement device and evaluated its boot capability.
When booting via MMC, he confirmed that the NAND capacity of the replacement dedvice is recognized correctly.
However, after writing the boot image to the replacement device and powering on the board with the NAND boot configuration, the UART (debug) output displayed only “CCC...” and the system failed to boot.
The replacement device would meet the boot ROM requirements for the AM3352BZCZ100, 
but could you please advise on any possible causes for the failure to boot from NAND? 

Best Regards,
Kanae

  • Hi Kanae,

    Do you have access to AM335 registers via debug probe?

    Can you read the values of the following registers?

    • 0x44e10040 CONTROL_STATUS register - can help to understand if sysboot pins are being latched correctly
    •  - can show ROM code's boot progress

    Thanks,

    Stan

  • Hi Kanae, 

    Customer needs to alter the ECC with the new part. They might be able to prove it is ECC by disabling ECC in the bootmode.
    The "C" characters indicate UART boot is searching for a boot image from the UART terminal.
    Part differences are shown below:

    EOL part (boots)
    MT29F2G16ABAEAWP-AIT:E
    Key features: 4-bit ECC required, 1 page = (1K + 32) words

    Datasheet: m69a_2gb_ecc_nand.pdf - Rev. T 02/18 EN    
    Open NAND Flash Interface (ONFI) 1.0-compliant
    16-bit
    3.3V
    Internal ECC? (likely disabled if worked)
    Array Organization – MT29F2G16 (x16)
    1 page = (1K + 32 words) 
    1 block = (1K + 32) words x 64 pages = (64K + 2K) words
    1 plane = (64K + 2K) words x 1024 blocks = 1056Mb
    1 device = 1056Mb x 2 planes = 2112Mb    (TWO-PLANE)

    – Page size x16: 1056 words (1024 + 32 words)
    – Block size: 64 pages (128K + 4K bytes)
    – Plane size: 2 planes x 1024 blocks per plane
    – Device size: 2Gb: 2048 blocks

    Parameter Page Byte 112 Number of bits ECC bits 04h


    Replacement part (doesnt boot - goes to secondary UART boot "C" chars)
    MT29F2G16ABAGAWP-AIT:G
    Key features: 8-bit ECC required, 1 page = (1K + 64) words

    Datasheet: m79a_2gb_parallel_nand_auto.pdf
    Open NAND Flash Interface (ONFI) 1.0-compliant
    16-bit
    3.3V
    Internal ECC disabled
    1 page = (1K + 64) words
    1 block = (1K + 64) words x 64 pages = (64K + 4K) words
    1 LUN = (64K + 4K) words x 1024 blocks = 1088Mb (LUN = plane?)

    – Page size x16: 1088 words (1024 + 64 words)
    – Block size: 64 pages (128K + 8K bytes)
    – Plane size: 2 planes x 1024 blocks per plane
    – Device size: 2Gb: 2048 blocks

    Parameter Page Byte 112 Number of bits ECC bits 08h

    -Mark

  • Hi Mark,

    Thank you for your support.

    SYSBOOT Configuration pin SYSBOOT[9] was changed
    from 0 (ECC handled by ROM) to 1 (ECC handled by NAND),
    and it was confirmed that the current boot image boots normally.
    Our customer understood that this issue was caused by a difference
    in how the out-of-band (OOB) area of ECC data is handled.

    Best Regards,
    Kanae

  • Hi Kanae,

    Changing SYSBOOT[9] is the best test to see if the issue is caused by ECC mismatch.

    But be careful - changing SYSBOOT[9] is not a solution to this problem because the part number of this NAND indicates Internal ECC disabled. According to the datasheet, the part number with internal ECC enabled would be MT29F2G16ABAGAWP-AITE:G

    They need to reprogram NAND using correct BCH scheme that the ROM bootloader assumes will be used by this NAND based on its OOB size.

    Let me clarify which BCH ROM assumes will be used and get back to you.

  • Hi Mark,

    Thank you for your additional input!
    I will share the above information with the customer.

    I am waiting to hear from you regarding the reprogramming method and the BCH scheme assumed by the ROM.

    Best Regards,
    Kanae

  • Hi Kanae,
    Here is one referende on the BCH scheme used in ROM and u-boot/Linux.
    https://www.kernel.org/doc/Documentation/devicetree/bindings/mtd/gpmc-nand.txt

    Was SoC-ECC or the nand on-die ECC used in the customer board with the current nand device?

    Best,
    -Hong

  • Hi Hong,

    Thank you for your support.

    Both the current product (MT29F2G16ABAEAWP AIT:E) and the replacement device (MT29F2G16ABAGAWP AIT:G)
    are used in a configuration where ECC processing is performed on the SoC side (SoC ECC).

    Is it correct to understand that this alternative device has no hardware issues and can be used
    once the software is reconfigured (to reflect information such as BCH8 (8-bit ECC) and OOB size: 128 bytes)?

    Best Regards,
    Kanae

  • Hi Kanae,
    In the current product (MT29F2G16ABAEAWP AIT:E), what is the BCH scheme used in the customer SW?
    Best,
    -Hong

  • Hi Hong,

    Thank you for your reply.

    The BCH scheme is BCH8.
    Regarding the write procedure, both of the following methods were tested, and the results were the same.

    1. Boot the CPU via MMC, then write the boot image currently used on the production unit to the replacement unit from the CPU.

    2. Suspecting that the following points might need to be considered when creating the boot image, I created and wrote a boot image for the (1024 + 64 words) version
    and wrote it, but the results remained unchanged.

    (Current Product) Page size x16: 1056 words (1024 + 32 words)
    (Replacement Product) Page size x16: 1088 words (1024 + 64 words)

    Our customer's CPU circuit configuration is almost identical to that of TMDXEVM3358 evaluation board.

    Best Regards,
    Kanae

  • Hi Kanae,
    Based on the new nand (MT29F2G16ABAGAWP-AIT:G) geometry, BCH16 needs to be used in the customer SW for gpmc-nand flashing and booting.
    Best,
    -Hong

  • Hi Hong,

    Thank you for your support.

    I will share it with my customer.

    Best Regards,
    Kanae

  • Hi Kanae,
    Let's know the test result with BCH16 setting in the customer SW on the new nand device.
    Best,
    -Hong