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AM62A7-Q1: I2C controller occasional clock offset.

Part Number: AM62A7-Q1

Hi,

We encountered an issue during our long-term testing. We have an I2C slave device, which is a deserializer device. During repeated restarts, we found that sometimes the clock and data sent on the I2C bus are abnormal.

The waveform of the I2C data we send under normal conditions on the I2C bus is as follows.

0aafd189-158a-44a9-839e-5c794ef49d64.png

After repeatedly restarting the device, the following abnormal waveforms will appear.

b1ee70f7-8a73-48e6-a50d-94e5aaad619e.png

It can be clearly seen that the clock corresponding to the ACK bit has experienced a severe offset.

We need TI's assistance to resolve this issue. The SDK version we are using is 10.01.

Thanks,

Yuwei