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AM3352: How do I Update DDR refresh rate?

Part Number: AM3352

Hi 

I am validating a new DDR with the AM3352BZCZD80. It is a 4Gb DDR3(L) SDRAM. We need to know the best practices for switching the refresh rate register (to double the refresh rate) while the device is active. We would like to double the DDR refresh rate once the temperature reaches 85C. This will be separate from the automatic-self-refresh (ASR) which only updates the refresh rate when the CPU is idle. 

Regards

PY Tsai

  • I also want to know it.

  • Hi, 

    AM335x does not officially support dynamic refresh rate changes.  If you want to support high temp operation, you can do one of the following:

    Option 1 — Permanently configure 3.9µs at boot If your system will ever reach 85°C, configure the doubled refresh rate from the start. The power and performance overhead of the faster refresh rate is modest, and this eliminates all runtime risk.  You can make this change using the AM335x EMIF tool spreadsheet by changing tREFI parameter

    Option 2 — Runtime write to SDRAM_REF_CTRL only (Note this is unvalidated and must be tested on your board) Write only the reg_refresh_rate field of SDRAM_REF_CTRL and SDRAM_REF_CTRL_SHDW at runtime when your temperature monitor crosses 85°C — without touching SDRAM_CONFIG

    In both cases, some timing may need to be de-rated above 85°C beyond just the refresh rate.  Check whether tRAS, tRC, or other parameters change. You'll also want to confirm your temperature monitoring mechanism (on-chip sensor vs. external) and its polling latency relative to thermal ramp rates. Finally, verify whether your bootloader or OS has existing safe points (e.g., a memory-quiescent window) where the register write could be staged to minimize any access-timing risk during the transition.

    Regards,

    James

  • Hi James, thanks for your response! For option 2, would there be a benefit to only updating the shadow? In other words once the when the temp monitor crosses threshold we would writie to SDRAM_REF_CTRL_SHDW, which in turn will update  SDRAM_REF_CTRL when it is safe, to allow me to minimize the risk of transitioning during runtime?

  • The shadow registers are only used during module idle acknowledgement (SIdleAck).  So if you are using this, it might be beneficial, because then you would be changing refresh rate during idle time.  But in certain situations, there may be long latency to switch (due to high activity at the refresh rate temp switching thresholds) which may not satisfy your system requirements.  This is what you would have to ensure in your system.  

    Regards,

    James