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Original question:

TDA4VM-Q1: stuck on the LDC node.

TDA4VM: LDC node Hangs after executing around 100 times

chenthil saminathan
Expert 1295 points

Part Number: TDA4VM

we faced similar issue and TI has provided the fix , we would like to confirm whether same fix will be appilicable for J721S2 11.01.00.04  also , Please once again can you share the exact patch applied as there were multiple fixes of iteration 

 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1531549/tda4vm-q1-stuck-on-the-ldc-node/5889571?tisearch=e2e-sitesearch&keymatch=LDC%20hang

  • 0 in reply to Brijesh Yadav
    TI__Mastermind 23690 points

    Hi  

    Yes, you can disable the wdTimer for ldc node to fix the issue, ( this is by default disabled in sdk 11.02)

    diff --git a/pdk_j721s2_11_01_00_17/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c b/pdk_j721s2_11_01_00_17/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
index a0e238bc..aabee93e 100755
--- a/pdk_j721s2_11_01_00_17/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
+++ b/pdk_j721s2_11_01_00_17/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
@@ -3635,7 +3635,7 @@ static void vhwaM2mLdcSetHtsCfg(const Vhwa_M2mLdcInstObj *instObj,
         htsCfg->pipeline        = instObj->pipeline;
         htsCfg->enableHop       = (uint32_t)UFALSE;
         htsCfg->numHop          = 0u;
-        htsCfg->enableWdTimer = (uint32_t)UTRUE;
+        htsCfg->enableWdTimer = (uint32_t)UFALSE;
 
         /* Enable the channel which are required */
         for (chCnt = 0; chCnt < VHWA_M2M_LDC_OUT_DMA_CH; chCnt ++)

    Regards,
    Gokul

  • 0 in reply to Gokul S
    Expert 1295 points

    Hi Gokul 

    we have applied this patch which was shared in older ticket

    diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
    index da3a7cb0..ca09b3d8 100755
    --- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
    +++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
    @@ -1235,6 +1235,16 @@ static void HtsSetSchConfig(uint32_t baseAddr, const CSL_HtsSchConfig *cfg)
    {
    CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET),
    HTS_HWA0_WDTIMER_WDTIMER_EN, 1U);
    + if ((uint32_t)UTRUE == cfg->isWdTimer128KMode)
    + {
    + CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET),
    + HTS_HWA0_WDTIMER_WDTIMER_MODE, 1U);
    + }
    + else
    + {
    + CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET),
    + HTS_HWA0_WDTIMER_WDTIMER_MODE, 0U);
    + }
    }
    else
    {
    diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
    index 9da92907..7361ef74 100755
    --- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
    +++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
    @@ -515,6 +515,9 @@ typedef struct
    uint32_t enableWdTimer;
    /**< Enable watch dog timer */

    + uint32_t isWdTimer128KMode;
    + /** Set to enable 128K mode for the Wd Timer */
    +
    uint32_t enableBwLimit;
    /**< Enable Bandwidth Limiter */
    uint32_t cycleCnt;
    diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
    index 9ccdf576..7fcbb2d7 100755
    --- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
    +++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
    @@ -2507,6 +2507,7 @@ static void vhwaM2mLdcSetHtsCfg(const Vhwa_M2mLdcInstObj *instObj,
    htsCfg->enableHop = (uint32_t)UFALSE;
    htsCfg->numHop = 0u;
    htsCfg->enableWdTimer = (uint32_t)UFALSE;
    + htsCfg->isWdTimer128KMode = (uint32_t)UTRUE;

    /* Enable the channel which are required */
    for (chCnt = 0; chCnt < VHWA_M2M_LDC_OUT_DMA_CH; chCnt ++)

  • 0 in reply to chenthil saminathan
    Expert 1295 points

    isWdTimer128KMode field is added please can u confirm 

    - htsCfg->enableWdTimer = (uint32_t)UTRUE;
    + htsCfg->enableWdTimer = (uint32_t)UFALSE;

    above change is sufficient

  • 0 in reply to chenthil saminathan
    TI__Guru**** 499185 points

    Hi Chenthil,

    Sorry, did not get your question, what Gokul replied was to completely disable the LDC WDG, but in the patch, i added 128KCycle option for LDC. So even if 128KCycle option is added, disabling WDG completely is sufficient. 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Expert 1295 points

    Thanks   we applied 128KCycle option  and disabling WDG completely , hope this should be ok

  • +1 in reply to chenthil saminathan
    TI__Guru**** 499185 points

    Yes,  , disabling WDG is ok in this case. 

    Regards,

    Brijesh