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AM62L: AM62L SPINAND Flash - SW config issue.

Rio Chan
Genius 16140 points

Part Number: AM62L

Champs:

My cust has used 2 platforms concurrently for diff projects:

On AM62X, we set this para as 2, the Serial NAND works well.
static SPINAND_OP_VARIANTS(read_cache_variants,
        SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),

On AM62L ,  we need to set this as 4, then, the Serial NAND works well.
static SPINAND_OP_VARIANTS(read_cache_variants,
        SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0),

Plz comment why this.

Thanks.

BR Rio

  • 0
    TI__Expert 5350 points

    Hi Rio,

    The parameter that's being increased is the dummy cycles.

    By making it 4 instead of 2 on AM62L, the SPI NAND flash is being more cycles to retrieve data internally, before OSPI controller starts reading data.

    This will be directly related to underlying OSPI controller clock frequency or PHY configurations.

    If you need more information, please share decompiled DTS from both the boards and clock summary.

    Capture clock summary as below

    cat /sys/kernel/debug/clk/clk_summary

    Regards,
    Vinu

  • 0 in reply to Vinuchandran A V
    TI__Genius 16140 points

    Hi Vinu:

    #1.

    The uboot / kernel of this parameter (dummy cycle is not consistency.)

    Please check.

    #2.

    My cust is challenging us: 

             Why the AM62X set 2 in both uboot + kernel, working fine.

             But the AM62L needs to set as 4 in both uboot + kernel. (Working fine.)

            Cust is asking: We are using the same IP (cadance) but why the AM62L needs to be slower (set as 4)?

    plz explain, thanks.

    BR Rio

  • 0 in reply to Rio Chan
    TI__Expert 5350 points

    Hi Rio,

    As mentioned, please share these information.

    Vinuchandran A V said:

    If you need more information, please share decompiled DTS from both the boards and clock summary.

    Regards,
    Vinu

  • 0 in reply to Vinuchandran A V
    TI__Genius 16140 points

    Hi Vinu:

    We can close this issue.

    I will check if this kind of issue met after cust PCB is beck.

    Thanks.

    BR Rio