edma3lld use in sysbios 6 problem!

Which version of SYS/BIOS are you using? Can you attach your. .cfg file?

Todd

Todd,

My SYS/BIOS version is  bios_6_32_01_38. This is .cfg file for server:

5670.all_syslink.cfg.txt

I added the configuration in this file :

/*Fixing the issue in BIOS 6.30.02.42, where the timer uses event
7 of ECM instead of 14*/
Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.timerSettings[0].intNum = 14;

/*use Eventcombiner modules for ti.sdo.edma3.drv.sample*/
var ECM = xdc.useModule ("ti.sysbios.family.c64p.EventCombiner");
ECM.eventGroupHwiNum[0] = 7;
ECM.eventGroupHwiNum[1] = 8;
ECM.eventGroupHwiNum[2] = 9;
ECM.eventGroupHwiNum[3] = 10;

Server built successfully, but when I loaded excutable file, the program not stop. Am I set this file correctlly?

I see that you have BIOS commented out in the .cfg file. ECM (and Load) are part of BIOS and you must include BIOS. Can you uncomment these lines and try rebuilding. Here are lines I'm talking about

/*var BIOS = xdc.useModule("ti.sysbios.BIOS");
BIOS.libType 	    = BIOS.LibType_Custom;
BIOS.logsEnabled    = false;
BIOS.assertsEnabled = false;*/

Make sure you call BIOS_start at the end of main() also.

Todd

Todd,

It's complier's configuration parameters, I commented it.  The edma3 examples test function seems like doesn't irq function, wheather I need to write a IRQ function or not? 

You must have the following line in your .cfg file. Can you uncomment this line and rebuild?

var BIOS = xdc.useModule("ti.sysbios.BIOS");

Todd,

I uncomment this line and rebuild server, the result stiil same with before. I step function in edma3lld with test_ping_pong_mode and there haven't any interrupt function:

 while (irqRaised1 == 0) {

        printf("waitting for interrupt...");

}

Hi,

Are you able to run the EDMA examples alone?

the callback function is specified while calling function EDMA3_DRV_requestChannel() which should be enough and driver will call this function in the ISR for that channel.

Can you check if the data transfer is done by checking the memory contents of destination and source address?

Just to confirm you are running on DSP core of ti816x right?

-- Prasad

Prasad, 

I use edma3lld library to run edma_test_ping_pong in examples, data transfer don't complete. When runing on while (irqRaised == 0u)  the ISR looks like still not start ...

Could I set parameter to trigger transfer from src buffer data to dst buffer data? Once the data transfer completed, the interrupt will be generated.

Yes, You can set the PaRAM values after transfer is completed and before freeing the channel.
Between allocate channel and free channel you can do transfers on that channel multiple times ane after the other.

Which EVM are you using? Is it ti816x evm? If so the examples provided should work as is. follow the make based build for examples as given in the userguide.

Regards,
Prasad

Prasad,

I has checked the data transfer is not completed by checking the memory contents of destination and source address. Hence the requestChannel  callback function not be called. I wonder know why the transfer is not completed, this is my configurations:

1) I init the edma3 handle with example configuration

2) requestChannel callback function is common.c callback1 in edma3 lld example 

3) Othes configuration paramset is the same with  edma_test_ping_pong.c example

Which platform are you using?

Can you try building the examples given in the LLD and run those before trying to integrate in your application, then you can check if you are missing anything.

get the PaRAM address using EDMA3_DRV_getPaRAMPhyAddr for your channel and check and post the contents of PaRAM (8 words starting phy address you got) before and after the trigger to transfer

Prasad, 

I'm trying to test edma event trig mode to generated interrupt with McASP, if it still can't transfer after testing I'll package all server's file to this post.

Sandeep,

1. I'm using the EDMA LLD package released by TI, and I just call the EDMA API to initialise it.

2. McASP driver wrote by my workmate in ARM Linux kernel, I just port it to DSP. 

3. I tried with the examples which comes with EDMA LLD package and it isn't working. But my leader let me debug EDMA with McASP, so I have to debug them together.

4. I'm using my company's custom board which on C6A8168 platform.

Comments:

I have uploaded the lastest program below, I will pack the McASP driver when all things done because  it looks like not enough clearly. All about EDMA functions located in edma_ping_pong.c file. The edma_init() function and edma_de-init() function edma_ping_pong() function called in mcasp_drv.c.

I fix some McASP registers' error, and I print all registers' value are normal. I'm sure the McASP clocks are fine, I measure the clock with OSC. I have read the EDMA documetion, still not clearly.

Serverl things want to confirm:

1. Whether EDMA3_DRV_requestChannel() function's parameters are ture or not ? (specially TCC parameter, it's EDMA_DRV_TCC_ANY on request master channel?)

2. If need to set parameter to master channel? Because it can work in ARM edma driver without set this, but set in EDMA LLD packags dma_ping_pong_test example.

3. All parameters set to two link channels are right?

Server's file here:

1050.ys_codecs.tar.gz

Hi, Sandeep

I tried the EDMA example and my EDMA driver, I can set EDMA register directly, but when I using API register,  the register not change any value(e.g opt interrupt register), Why?

benlu yu,

When you say examples and my EDMA driver, are you using the prebuilt libs provided with the LLD or you have modified the driver?

Please check the base address of the EDMA registers in your custom board and the base address in the cfg.c file in drv/sample/src/platform folder used for your library.

If you are getting any error code returned from the driver, mention the API and the return code.

Can you step through the driver and check to which memory location the API is actually trying to write?

Regards,
Prasad

Prasad,

I'm using perbuilt libs provided with the EDMA3 LLD. I check the EDMA base address of the cfg.c file, the base address of EDMA is 0x49000000.

I suspect if there have any interrupt enable configuration must be enable for EDMA interrupt generatted.

All API functions from drv/edma3_drv.h was normal and didn't reture any error, the callback function not be called. I think if the interrupt is generated, the TccCb irq would be called in requestChannel() function.

I'm using the malloc() function to request memory.

Prasad, 

My device is C6A8168, using DMA channel 10 for McASP1 tx channel and DMA channel 11 for McASP1 rx channel.

I checked some register and list here:

DCHMAP10:0x00003c00(pointting to 480 PaRAM set)  481 and 482 is two tx link channel PaRAM set number

DCHMAP11:0x00003c60(pointting to 483 PaRAM set)  484 and 485 is two rx link channel PaRAM set number

DRAE1: 0xc00     channel 10 and 11

EMR: 0x0             

ER: 0x0                 

EER: 0xc00           channel 10 and 11

SER: 0x0                

IER: 0xc00           channel 10 and 11

IPR: 0x0

Event register and interrupt pending register is null value, looks like no event captured and no interrupt pending for tx and rx...

Also I printed the link and master channel PaRAM set value, six PaRAM is configured correctly.  This is my initialize EDMA driver

1512.edma3_ping_pong.c.txt

hi,all

when I use debug mode, it passed, but release mode fail. I checkout the release document, ping pong example fails for some cores in release mode.

If all ping pong mode include example will fail in this EDMA LLD library?