Part Number: AM620-Q1
Other Parts Discussed in Thread: AM6252, DP83869, AM620
Hi,
We plan to go with this Sitara processor Part number AM6202 – No Display & NO GPU Configuration as part of our trade study for low power consumption. Can you please help us the following queries on this processor and PMIC.
Regarding Processor: AM6202BTGFHIAMCRQ1
- Is this part number “AM6202BTGFHIAMCRQ1” suitable for this configuration with FuSa feature
- When this IC launched on market..? There are no stock availability in supplier(Digi-Key,Mouser), How to purchases..?
- EOL status for this part.?
- Provide Evaluation part number with LPDDR4 part used in reference design.
- Power measurements report for this Part..? ( Measurements taken from Oscilloscope, Not Power calculator Tool in excel)
- We need to access the RGMII interface directly from Sitara processor (Instead of MDI lines), How to get the RGMII interface lines.?
- Is LPDDR4 supports Dual rank..? if dual rank supports, how much maximum memory capacity can use..? Suggest, if there is any Ti tool to select the right LPDDR4 Part for Sitara processor.?
- Do we have reference board stack up for this 441-pin FCBGA AMC Package
- Why 32.768KHz crystal required for AM6252 processor? If we are not using in the design any effects on the processor performance?
- If SGMII is used on the Ethernet L2 switch side and RGMII is used on the processor side in the DP83869 Ethernet PHY, can the PHY operate in a transparent mode? (Bridge type)
- EOL Status of this IC DP83869
- if we select the part respective clock frequency (Eg: T= 1.4GHz (0.85V), 400MHz M4F), can able to change the frequency up/down through SW.?
Regarding PMIC: TPS6521920WRHBRQ1
- Is this PMIC part “TPS6521920WRHBRQ1 “ suitable for LPDDR4 Design.
- How to do first time EEPROM programming in IC..?
- is it Internal EEPROM or whether it is communicate from processor through I2C..? once VSYS Power Up.
- is this EEPROM one time programmable by Ti, or can able to write by user..?, if yes, how we can write/read to the EEPROM.
- Is voltage monitor available for input(VSYS) & all Output rail.?
