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AMMU config in OMAP4430

Hi

 

I'd like to some clarification on the flags you can set in the AMMU on OMAP4430

for register  SCACHE_MMU_LARGE_POLICY_i, there are several bits available to set, like

- L1_ALLOCATE and L2_POSTED

- L1_ALLOCATE and L2_POSTED

What does these mean?

 

also, for register SCACHE_OCP, there are three bits which I don't understand

WRALLOCATE, WRBUFFER and WRAP

What does these mean?

 

Furthermore, in chapter 5.4.2, the TRM says that that L1 consists of only 32kB, while in chapter 2.5 SL2->L1 is defined as a 128kB region. Why is this?

 

Chapter 5.4.2, it also says that L2 can be configured as both memory and cache. Can you explain how I do this?

 

BR
Niklas

 

 

 

 

  • Niklas,

    The bits that you referenced configure different aspects of the DSP cache interface and cache policy.  Since the details of the DSP subsystem are not in the public domain, you will need to contact your TI representative directly for more specific answers to these questions.

    Regards,

    Gina