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SDMA Request Scheme

Other Parts Discussed in Thread: AM3517

In the AM3517 dev guide, section 7.2.2 states that the hardware DMA request lines can be either edge sensitive or transition sensitive. It then tries to explain transition sensitive (pretty confusing).

Regardless, the next page, section 7.3.1 states that a logical channel can be configured to be active low on level or falling edge.

I'd like to run the nDMAREQ as active low, level sensitive. Is this the same as the "transition sensitive" as described in 7.2.2?

If so, can someone better explain the requirements of "transition sensitive"?

  • I think what section 7.3.1 is saying is that you can program the logical channel to respond to an external request (synchronized) vs a software-controlled request (unsynchronized).  I haven't seen anything that indicates that the logical channel is configured to respond based on whether the request is edge or level sensitive.  I think that's done only with the controls in section 7.2.2.

    HTH