Part Number: CCSTUDIO
Hi expert,
My customer use TI MSPM0 device. For our ARM compliler, 20.2.x.LTS, does it support position independent code(PIC)? If yes, do we have some guidance to help use enable the function? Thanks!
BR,
Fengyu
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Part Number: CCSTUDIO
Hi expert,
My customer use TI MSPM0 device. For our ARM compliler, 20.2.x.LTS, does it support position independent code(PIC)? If yes, do we have some guidance to help use enable the function? Thanks!
BR,
Fengyu
Hi Fengyu,
does it support position independent code(PIC)?
Unfortunately position independent code is not supported.
Thanks and regards,
Mackay
Hi Mackay,
Thanks for your feedback.
Customer found that TI ARM Clang support PIC via below link.
https://software-dl.ti.com/codegen/esd/cgt_public_sw/ARM_LLVM/5.1.0.LTS/README.html

Could you please help double check if it can support PIC for TI M0 application?
BR,
Fengyu
Hi Fengyu,
Thanks for your question!
To clarify, the ARM 20.2.x LTS compilers do not support Position Independent Code (PIC) generation. However, the ARM Clang compiler versions 5.1 and later do support PIC generation using the `-fPIC` compiler option, though library support is limited to little-endian R4, R5, and R52 targets.
Unfortunately position independent code is not supported for M0 targets on ARM 20.2.x.LTS or ARM CLANG compilers.
Thanks and regards,
Mackay