AM62A7: AM62A7: Configuring Spread Spectrum Clocking on DPI

Holden Wozniak

Part Number: AM62A7
Other Parts Discussed in Thread: DS90C387, AM62P

Hi,

We are currently trying to get a prototype board ready for EMI testing and find that the LVDS cable has emmissions that would cause us to fail. The emissions are all harmonics of the LCD fundamental frequency (Fclk) at 71.2 MHz which lines up with the 142.4 MHz DSS clock.

The processor SDK (specifically https://texasinstruments.github.io/processor-sdk-doc/processor-sdk-linux-AM62AX/esd/docs/master/linux/How_to_Guides/Target/How_to_enable_SSC_for_DSS.html) suggests we should be able to enable SSC in hopes it would reduce the amplitude of the harmonics though I have been finding conflicting documentation about whether or not SSC is supported on the AM62A (https://www.ti.com/lit/ug/sprad85d/sprad85d.pdf?ts=1776186993133)

Regardless, following the processor SDK notes I added the following lines to the DSS device tree node

assigned-clocks = <&k3_clks 186 2>;
assigned-clock-sscs = <50000 50 3>;

In reading the PLL17 registers (specified in www.ti.com/.../spradk1.pdf
it seems like this device tree modification did not do anything as the SSC is bypassed and the modulation frequency and depth are not set to what the device tree specifies.

$ devmem2 0x691020 w
/dev/mem opened.
Memory mapped at address 0xffff8c99e000.
Read at address  0x00691020 (0xffff8c99e020): 0x00018013

$ devmem2 0x691040 w                                                                                                                                                                         
/dev/mem opened.
Memory mapped at address 0xffff9e044000.
Read at address  0x00691040 (0xffff9e044040): 0x80000000

$ devmem2 0x691044 w                                                                                                                                                                         
/dev/mem opened.
Memory mapped at address 0xffffa54da000.
Read at address  0x00691044 (0xffffa54da044): 0x00010001

Is SSC supported for the DSS clock? Am I looking at the correct registers?

Thanks,

Holden

4 months ago

0 Kallikuppa Sreenivasa 4 months ago

TI__Guru**** 231505 points

Hello Holden

Thank you for the query.

Holden Wozniak said:
We are currently trying to get a prototype board ready for EMI testing and find that the LVDS cable has emmissions that would cause us to fail. The emissions are all harmonics of the LCD fundamental frequency (Fclk) at 71.2 MHz which lines up with the 142.4 MHz DSS clock.

I see DPI (parallel bus) and LVDS mentioned.

Is there a parallel to LVDS converter you are using.

Can you please elaborate tour inputs.

Regards,

Sreenivasa

0 Holden Wozniak 4 months ago in reply to Kallikuppa Sreenivasa

Prodigy 40 points

Hi Kallikuppa,

We are using the DS90C387 to convert DPI to LVDS. We are unsure if the converter even supports SSC on the input clock but we figured we can enable it and test it to see how it interacts. We are using the tidss driver to handle the DSS.

Thanks,

Holden

0 Holden Wozniak 4 months ago in reply to Kallikuppa Sreenivasa

Prodigy 40 points

Wanted to follow up that we were able to configure the SSC by writing to the registers directly after the PLL sequence is finished and it is locked by following 2.2 of https://www.ti.com/lit/an/spradk1/spradk1.pdf?ts=1776152369034&ref_url=http%253A%252F%252Ffocus.ti.com%252Flit%252Fpdf%252Fspradk1.

- Set 0x691020 to 0x00000000 to enable SSC

- Set 0x691020 to 0x00060005 for 33.2 kHz mod frequency and 0.5% depth

Doing so we saw very noticeable drops in the harmonics. We are still looking into how it affects the video output with the DS90C387 but at the very least this is a method that works to configure SSC on the DSS clock.=

I was wondering if there is any way to do this in the kernel/device tree like mentioned in the processor SDK? Writing to the register directly in userspace is okay for resolving EMI issues for the time being but eventually we would want this to be done by the kernel at boot. We are using the AM62A SDK 10.

0 Kallikuppa Sreenivasa 4 months ago in reply to Holden Wozniak

TI__Guru**** 231505 points

Hello Holden

Thank you for the inputs and good to hear the progress.

Holden Wozniak said:
I was wondering if there is any way to do this in the kernel/device tree like mentioned in the processor SDK? Writing to the register directly in userspace is okay for resolving EMI issues for the time being but eventually we would want this to be done by the kernel at boot. We are using the AM62A SDK 10.

Let me check with the software expert.

Regards,

Sreenivasa

0 Divyansh Mittal 4 months ago in reply to Kallikuppa Sreenivasa

TI__Genius 16530 points

Hi Holden,
Seems like you are trying to configure the PLL17 register directly in the userspace. It is not recommended to do so even in the linux kernel bootup since it can render PLL17 into an unstable state. Only the PLL17_SS_CTRL and PLL17_SS_SPREAD register should be modified during bootup.

To enable this, there will be multiple changes needed.
There are some DM image related changes in WKUP R5 core that will be needed, SSC on DM image in WKUP R5 was enabled in 11.02 (not yet released for AM62A).
The linux related changes in dts you mentioned earlier (introduced in 12.0 SDK of AM62x) can further be added to implement this in linux.

I understand these would be many changes that you would need to do at your end, I can share all the relevant patches for you to be able to create your DM image, as well as the linux driver patches to enable this.

Let me know if this is okay with you.

0 Holden Wozniak 4 months ago in reply to Divyansh Mittal

Prodigy 40 points

Hi Divyansh,

If you could send me those patches that would be great, thank you!

0 Divyansh Mittal 4 months ago in reply to Holden Wozniak

TI__Genius 16530 points

Hi Holden,
Thanks. Please allow till upcoming Monday/Tuesday, I'll collate the patches and share.

0 Divyansh Mittal 4 months ago in reply to Divyansh Mittal

TI__Genius 16530 points

Hi Holden,
Sorry for the delay, but there have been major changes in the SDK from 10.1 up-till now, we are evaluating how to provide patches on 11.01. Just wanted to check if 11.01 patches (if provided) would be acceptable?

0 Holden Wozniak 4 months ago in reply to Divyansh Mittal

Prodigy 40 points

Hi Divyansh,

Yes that would be fine, thank you.

0 Jay Goyal 4 months ago in reply to Holden Wozniak

TI__Expert 4060 points

Hi Holden,

Apologies for the delay in the reply. For enabling the feature on AM62A, you will need to rebuild the DM R5 application, which requires access to firmware builder[1]. This requires an active NDA with TI to get access. I am sharing patches on top of the Linux kernel and Firmware Builder to enable SSC.

On top of these changes, you also need to configure SSC using the parameters using device tree overlays as mentioned in this document for AM62P[2]. Do note that instead of &dss0, it is &dss for AM62A.

Regards,
Jay

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/kernel.patch
https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/firmware_2D00_builder.patch

[1] https://www.ti.com/drr/opn/FIRMWARE-BUILDER-AM62A
[2] https://software-dl.ti.com/processor-sdk-linux/esd/AM62PX/latest/exports/docs/linux/How_to_Guides/Target/How_to_enable_SSC_for_DSS.html

Processors

Processors forum

AM62A7: AM62A7: Configuring Spread Spectrum Clocking on DPI