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J784S4XEVM: CSITX not transmitting when CSIRX is enabled (works standalone, fails together)

Hojung Bae
Prodigy 100 points

Part Number: J784S4XEVM

Hello,

I am currently testing CSI code on an EVM board, which will eventually be used on a custom board.
The target configuration is to use 3 RX ports and 1 TX port.

I am developing based on the following examples:

  • csitx_transmit_test (from the CSITX example)
  • csirxtx_loopback_test (from the CSIRX example)

Since the TRX ports will be directly connected to an external device in the final setup,
I am testing on the EVM by directly connecting RX instance 2 and TX instance 1 using a cable.

When I load and run the csitx_transmit_test example image, it works correctly.

Issue

When running the TX task alone, I can confirm that the Complete Callback is invoked properly.

However, when I run the RX task together with the TX task, the TX no longer operates (no callback is triggered).

Logs

  • Below are the logs when running TX and RX tasks together:

    =================================================================
 DMSC Firmware Version 11.1.8--v11.01.08 (Fancy Rat)
 Firmware revision 0xb
 ABI revision 4.0
=================================================================
Sciclient_ccs_init Passed.
SCISERVER Board Configuration header population... PASSED
[MAIN_Cortex_R5_0_0] 
Clock Freq: CSITX_MOD_ESC_CLK = 20000000Hz
Clock Freq: CSITX_MOD_DPHY_TXBYTECLKHS_CLK = 0Hz
Clock Freq: CSITX_MOD_VBUS_CLK = 250000000Hz
Clock Freq: CSITX_MOD_MAIN_CLK = 500000000Hz
CSI RX PMSet 0
CSI_RX_TASK: Sample Application - STARTS !!!
CSI_RX_TASK:===================Setup Details===================
CSI_RX_TASK: Capture Instance: 2
CSI_RX_TASK: Capture DF:0x2c
CSI_RX_TASK: Capture Resolution:1920 x 1080
CSI_RX_TASK:===================================================
CSI_RX_TASK:Set D-PHY Configuration Successful for CSIRX instance 2!!!
CSI_RX_TASK: CSIRX Capture created for CSIRX instance 2
Wait gAppCompletionSem
Wait gAppCompletionSem
Start CSI TX...
gAppCompletionSem Post
Wait Event
CSI_TX_TASK: CSITX start of frame interrupts for CSITX instance:1 in 10 sec is 0!!!

  • Below are the logs when running TX task only:

     

    Sciclient_ccs_init Passed.
SCISERVER Board Configuration header population... PASSED
[MAIN_Cortex_R5_0_0] 
Clock Freq: CSITX_MOD_ESC_CLK = 20000000Hz
Clock Freq: CSITX_MOD_DPHY_TXBYTECLKHS_CLK = 0Hz
Clock Freq: CSITX_MOD_VBUS_CLK = 250000000Hz
Clock Freq: CSITX_MOD_MAIN_CLK = 500000000Hz
Start CSI TX...
Tx[1] Frame 250
Tx[1] Frame 500
Tx[1] Frame 750

Tx[1] Frame: xxx — this log is printed from the TX complete callback.

rtos_app.zip  I’ve attached the code I’m currently testing. It’s still in the early stages of development, so it’s quite messy—thanks for your understanding. 

I would appreciate any guidance on what might be causing this issue.

thank you.

  • 0
    TI__Guru**** 500615 points

    Hi Hojung Bae,

    Sorry, did not understand the application that you are using? Are you using retransmit example? Because this example connects directly CSIRX to CSITX, bypassing DDR. We will not get the callback from both CSIRX and CSITX in this case because its internal HW connection.. 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 100 points

    Hi Brijesh,

    We are using a system with a TDA4 SoC and a ZYNQ FPGA. The FPGA’s three CSI TX ports are directly connected to the TDA4’s three CSI RX ports. In addition, the FPGA RX is connected to the TDA4 TX.

    For testing, we are primarily using the csitx_transmit_test example on the TX side, and the TX-RX ports are directly connected via cables. For the RX side, we only referred to the loopback example for multi-port usage, but most configurations are based on csitx_transmit_test. Also, instead of using CSIRX_CH_TYPE_LPBK, we configured it as CSIRX_CH_TYPE_CAPT.

    TX Task runs fine on its own, but when running it together with the RX Task, it does not work properly. I would like to understand whether this issue is caused by configuration problems, UDMA resource conflicts, or some other reason.

    Additionally, could you provide guidance on how to structure the source code for the system configuration described above?

    thank you.

  • 0 in reply to Hojung Bae
    Prodigy 100 points

    To match the same environment as csitx_transmit_test, we set TRX TEST_INST_NUM to 1 and configured the test to use only CSITX_INSTANCE_ID_1 and CSIRX_INSTANCE_ID_2. We are also using the same configuration values as defined in App_initTxParams and App_initCaptParams.

    The main differences from the original csitx_transmit_test example are that the TX and RX tasks are separated, and there are additional for-loops for buffer handling and processing according to TEST_INST_NUM.

  • 0 in reply to Brijesh Jadav
    Prodigy 100 points

    It was identified that executing the following code on the RX side caused the issue:

    Fvid2InitPrms_init(&initPrms);
    initPrms.printFxn = &App_fvidPrint;
    retVal = Fvid2_init(&initPrms);

    Thank you.