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SK-AM62: Issue during flash the SOC initialization binary to the EVM

Part Number: SK-AM62
Other Parts Discussed in Thread: UNIFLASH, SYSCONFIG

Hello Team,

MCU+SDK Package: mcu_plus_sdk_am62x_11_01_00_16

Below is the error message reported during flash the SOC initialization binary at flash-phy-tuning-data operation step:

image.png

We have tried few times with power cycle EVM and run the script again.. but issue remains same.

We also tried to skip this section by removing "--operation=flash-phy-tuning-data" and flashing is successful.

Can you please provide your feedback on this?

BR,
Shubham

  • Hi Shubam,

    I assume this is on TI EVM, could you confirm if you are facing this issue with custom board or a TI EVM?

    Have you made any changes to UART UNIFLASH example/flash driver code?

    Best Regards,

    Meet.

  • Hi Meet,

    I assume this is on TI EVM, could you confirm if you are facing this issue with custom board or a TI EVM?

    I am facing this with TI EVM.

    Have you made any changes to UART UNIFLASH example/flash driver code?

    I am using default configuration of mcu_plus_sdk_am62x_11_01_00_16, and issue is observed at Flash SOC Initialization step as mentioned in file:///C:/ti/mcu_plus_sdk_am62x_11_01_00_16/docs/api_guide_am62x/EVM_SETUP_PAGE.html .

    BR,
    Shubham

  • Hi Shubham Goel,

    If you are using the EVM, it is possible that either the SDK SBL stage2 or the SysConfig setup might be corrupted.

    Could you please confirm if any changes were made to the following files?

    1. mcu_plus_sdk_am62x_11_01_00_16/source/drivers/bootloader/bootloader_uniflash.c
    1. mcu_plus_sdk_am62x_11_01_00_16/examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/example.syscfg

    If modifications were made, that could be causing the issue.

    As a next step, I would recommend reinstalling the SDK and trying again with a clean setup by following:
    mcu_plus_sdk_am62x_11_01_00_16/docs/api_guide_am62x/EVM_SETUP_PAGE.html

    We also tried to skip this section by removing "--operation=flash-phy-tuning-data" and flashing is successful.

    Removing --operation=flash-phy-tuning-data does NOT break functionality, but it reduces performance margin and robustness, especially for high-speed OSPI use cases.

    Thanks,
    Jomy

  • Hi  

    If you are using the EVM, it is possible that either the SDK SBL stage2 or the SysConfig setup might be corrupted.

    Could you please confirm if any changes were made to the following files?

    1. mcu_plus_sdk_am62x_11_01_00_16/source/drivers/bootloader/bootloader_uniflash.c
    1. mcu_plus_sdk_am62x_11_01_00_16/examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/example.syscfg

    If modifications were made, that could be causing the issue.

    As a next step, I would recommend reinstalling the SDK and trying again with a clean setup by following:
    mcu_plus_sdk_am62x_11_01_00_16/docs/api_guide_am62x/EVM_SETUP_PAGE.html

    I am using default files and no modification were performed on the mentioned files.

    I also tried to reinstall the SDK but issue remains same.

    Removing --operation=flash-phy-tuning-data does NOT break functionality, but it reduces performance margin and robustness, especially for high-speed OSPI use cases.

    For mcu_plus_sdk_am62x_11_01_00_16, fls operation working as expected by removing "--operation=flash-phy-tuning-data" but when we update the SDK package to mcu_plus_sdk_am62x_11_02_00_23, the same issue is observed and we are not able to proceed the flashing step by removing "--operation=flash-phy-tuning-data".

    BR,
    Shubham

  • Hi ,

    Which TI EVM are you using— is it HS_FS device?

    Thanks,

    Jomy

  • Hi  

    It is GP device.. and we are flashing "--cfg=sbl_prebuilt/am62x-sk/default_sbl_null.cfg".

    BR,
    Shubham

  • Hi ,

    I’ll try this on the hardware and get back to you.

    Thanks,
    Jomy

  • Hi Shubham,

    I tried this at my end with a GP board and flashing works for me without any issue:

    ❯ python3 uart_uniflash.py -p /dev/ttyUSB0 --cfg=sbl_prebuilt/am62x-sk/default_sbl_null.cfg
    
    Parsing config file ...
    Parsing config file ... SUCCESS. Found 5 command(s) !!!
    
    Executing command 1 of 5 ...
    Found flash writer ... sending sbl_prebuilt/am62x-sk/sbl_uart_uniflash_stage1.release.tiimage
    Sent flashwriter sbl_prebuilt/am62x-sk/sbl_uart_uniflash_stage1.release.tiimage of size 264897 bytes in 26.62s.                                                                                 
    
    Executing command 2 of 5 ...
    Command arguments : --file=../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage --operation=flash --flash-offset=0x0
    Sending ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage: 131712bytes [00:14, 1Sending ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage: 131713bytes [00:14, 1Sending ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage: 131714bytes [00:15, 1Sending ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage: 131715bytes [00:15, 1Sending ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage: 131716bytes [00:15, 1                                                                                                                                                                                                Sent ../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage of size 130676 bytes in 15.78s.
    [STATUS] SUCCESS !!!
    
    Executing command 3 of 5 ...
    Command arguments : --operation=flash-phy-tuning-data
    Sent flash phy tuning data in 3.1s.                                                                                                                                                             
    [STATUS] SUCCESS !!!
    
    Executing command 4 of 5 ...
    Command arguments : --file=sbl_prebuilt/am62x-sk/sbl_null.release.tiimage --operation=flash --flash-offset=0x0
    Sent sbl_prebuilt/am62x-sk/sbl_null.release.tiimage of size 292289 bytes in 30.46s.                                                                                                             
    [STATUS] SUCCESS !!!
    
    Executing command 5 of 5 ...
    Command arguments : --file=../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage --operation=flash --flash-offset=0xA00000
    Sent ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage of size 187484 bytes in 20.67s.                              
    [STATUS] SUCCESS !!!
    
    All commands from config file are executed !!! 

    You mentioned that the flashing works after removing --operation=flash-phy-tuning-data, could you share the logs confirming the same.

    Could you also confirm if the SoC is booting properly in case you are skipping the phy tuning data flashing.

    Best Regards.

    Meet.

  • Hi Meet,

    I tried this at my end with a GP board and flashing works for me without any issue:

    I borrowed other GP board and flashing works fine on that.. Our query is how we can overcome with the mentioned issue for our board.

    You mentioned that the flashing works after removing --operation=flash-phy-tuning-data, could you share the logs confirming the same

    Please find below iamge:

    Could you also confirm if the SoC is booting properly in case you are skipping the phy tuning data flashing.

    Please find below attached UART terminal output:

    Above are the observation for mcu_plus_sdk_am62x_11_01_00_16.

    Please let me know if you need any other information.

    BR,
    Shubham

  • Hi ,

    how we can overcome with the mentioned issue for our board.

    For clarification, are both boards the same or different? If both boards are identical and one board is working while the other is not, then it could possibly be a hardware-related issue.

    Thanks,

    JOMY

  • Hi  

    For clarification, are both boards the same or different? If both boards are identical and one board is working while the other is not, then it could possibly be a hardware-related issue.

    Yes.. both the boards are identical and it looks like a hardware issue.

    Can you please suggest us to fix it on our side?

    Thanks in advance.

    BR,
    Shubham

  • Hi Shubham,

    It is difficult to isolate the root cause as it could be anything when it comes to a fault in the hardware.

    What I would like to do is proceed this way.

    Please give me a yes or a no to each of these questions.

    1. I believe any experiment you are running is not having any changes to the SysConfig > OSPI and FLASH settings and you are using the default SDK settings?
    2. On the faulty board, when you remove the line "--operation=flash-phy-tuning-data" and flash, the flashing is successful? --> I think YES as per your above comment.
    3. After step 2, when you try to boot, do you see the correct logs for SBL Null?
    4. If you see the SBL Null logs, then are you able to see your DM app running?

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Please find my response below:

    I believe any experiment you are running is not having any changes to the SysConfig > OSPI and FLASH settings and you are using the default SDK settings?

    Yes.. we are using default settings.

    On the faulty board, when you remove the line "--operation=flash-phy-tuning-data" and flash, the flashing is successful? --> I think YES as per your above comment.

    Yes.. For SDK mcu_plus_sdk_am62x_11_01_00_16 it works fine after removing "--operation=flash-phy-tuning-data". but when we update the SDK package to mcu_plus_sdk_am62x_11_02_00_23, the same issue is observed and we are not able to proceed the flashing step by removing "--operation=flash-phy-tuning-data".

    After step 2, when you try to boot, do you see the correct logs for SBL Null?

    Yes.. the logs returns success for flashing after removing "--operation=flash-phy-tuning-data(Please find below log image).

    If you see the SBL Null logs, then are you able to see your DM app running?

    Yes.

    BR,
    Shubham

  • Hi Shubham,

    Thanks for the confirmation.

    I would like to know if the booting is also successful, by SBL Logs I meant the logs which you shared here:

    Please find below attached UART terminal output:

    Regards,
    Vaibhav

  • Hi Vaibhav,

    I would like to know if the booting is also successful, by SBL Logs I meant the logs which you shared here:

    Please find below attached UART terminal output:

    Yes.. these are the SBL logs on non working board after "--operation=flash-phy-tuning-data" step removed.

    BR,
    Shubham

  • Hi Shubham,

    So this is my analysis:

    • After removing the "--operation=flash-phy-tuning-data" it is seen that the flashing and booting, both are successful.
    • Now, the line which you removed, I hope you are aware of why it has been introduced in the configuration file termed as .cfg. If not, then I would have you read the following FAQ:  [FAQ] SK-AM64B: What is the purpose of --operation=flash-phy-tuning-data ? 
    • Looks like it is already flashed at the location/offset where it needs to be present at. The reason I am saying this is because when you boot, your default SDK SBL Null has a SysConfig setting of OSPI, where OSPI has PHY Enabled option checked.
    • This means that your bootloader is going to read the DM Appimage and this read operation would be a PHY enabled read, which in your case, its a success.

    CONCLUSION: Hence the root cause could be that your flash S28HS512T has its topology changed, that is maybe it has been switched to Hybrid instead of Uniform mode.

    But before I jump to my above conclusion, I would like you to check on the other UART COM Ports, if the IPC logs come up? That would mean that the SBL/Bootloader read the DM Appimage successfully and executed it.

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Sorry for delay in response.

    Below is the output on 3rd UART COM Port, which run from DM:

    For 2nd and 4th Port.. there is no information:

    Please let me know your feedback.

    BR,
    Shubham

  • Hi Shubham,

    Now based on your logs, it looks like the SBL is flashed correctly along with the DM Appimage.

    CONCLUSION: Hence the root cause could be that your flash S28HS512T has its topology changed, that is maybe it has been switched to Hybrid instead of Uniform mode.

    I believe this holds true.

    To figure out if the above statement holds, we can perform a set of flash register reads which will give us the relevant information.

    I am going to share the changes to be made in the file flash_nor_ospi.c, post which you have to make the change, build the board files again and then simply flash + boot, this way we can see the logs. FYI, the changes that I will provide will be a bunch of log statements inside the file flash_nor_ospi.c. Allow me sometime. I see you are on 11.1, so I will provide the changes for 11.1 SDK's flash_nor_ospi.c file.

    Regards,

    Vaibhav

  • Hi Shubham,

    I am sharing the changes of the API.

    Not sharing a patch as it may not fit on your driver, given you may have made any minor changes.

    Just sharing the API so that you can simply copy and replace the existing API.

    The API is Flash_norOspiOpen. The changes are just bunch of logging statements which prints the Flash's register values.

    static int32_t Flash_norOspiOpen(Flash_Config *config, Flash_Params *params)
    {
        int32_t status = SystemP_SUCCESS;
        Flash_NorOspiObject *obj = (Flash_NorOspiObject *)(config->object);
        Flash_Attrs *attrs = config->attrs;
        int32_t attackVectorStatus = SystemP_FAILURE;
        uint32_t readDataCapDelay, phyTuningOffset;
    
        obj->ospiHandle = OSPI_getHandle(attrs->driverInstance);
    
        if(obj->ospiHandle == NULL)
        {
            status = SystemP_FAILURE;
        }
    
        if(SystemP_SUCCESS == status)
        {
            /* Set device size and addressing bytes */
            OSPI_setDeviceSize(obj->ospiHandle, attrs->pageSize, attrs->blockSize);
    
            /* Set command opcode extension type */
            OSPI_setCmdExtType(obj->ospiHandle, config->devConfig->cmdExtType);
    
            /* Set initial number of address bytes */
            obj->numAddrBytes = 3;
    
            /* Set current protocol as 1s1s1s */
            obj->currentProtocol = FLASH_CFG_PROTO_1S_1S_1S;
    
            /* Now configure the flash for the selected protocol */
            status += Flash_norOspiSetProtocol(config, obj->ospiHandle, params);
            obj->currentProtocol = config->devConfig->protocolCfg.protocol;
    
            /* Set number of address bytes. If 4 byte addressing is supported, switch to that */
            status += Flash_norOspiSetAddressBytes(config, obj->ospiHandle);
    
            /* Set opcodes in OSPI controller */
            OSPI_setXferOpCodes(obj->ospiHandle, config->devConfig->protocolCfg.cmdRd, config->devConfig->protocolCfg.cmdWr);
    
            /* Set Mode Clocks and Dummy Clocks in Controller and Flash Memory */
            status += Flash_norOspiSetModeDummy(config, obj->ospiHandle);
    
            /* Set RD Capture Delay by reading manufacture ID and device ID */
            status += Flash_norOspiSetRdDataCaptureDelay(config);
        }
    
        if(SystemP_SUCCESS == status)
        {
            if(SystemP_SUCCESS == OSPI_skipTuning(obj->ospiHandle))
            {
                OSPI_enablePhy(obj->ospiHandle);
    
                /* PHY configuration are already stored and has to be written into register */
                OSPI_phyWriteTunedVal(obj->ospiHandle);
    
                /* Set RD Capture Delay by reading ID */
                readDataCapDelay = 15U;
                OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                while((attackVectorStatus != SystemP_SUCCESS) && (readDataCapDelay > 0U))
                {
                    readDataCapDelay--;
                    OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                }
    
                if(SystemP_SUCCESS == attackVectorStatus)
                {
                    obj->phyEnable = TRUE;
                }
    
                OSPI_disablePhy(obj->ospiHandle);
            }
    
            if(SystemP_SUCCESS != attackVectorStatus || SystemP_SUCCESS != OSPI_skipTuning(obj->ospiHandle))
            {
                /* Enable PHY if attack vector present and PHY mode is enabled */
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                if(OSPI_isPhyEnable(obj->ospiHandle))
                {
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                    if(attackVectorStatus != SystemP_SUCCESS)
                    {
                        /* Flash the attack vector to the last block */
                        uint32_t blk = 0, page = 0;
                        uint32_t phyTuningData = 0,phyTuningDataSize = 0;
                        OSPI_phyGetTuningData(&phyTuningData, &phyTuningDataSize);
                        Flash_offsetToBlkPage(config, phyTuningOffset, &blk, &page);
                        Flash_norOspiErase(config, blk);
                        Flash_norOspiWrite(config, phyTuningOffset, (uint8_t *)phyTuningData, phyTuningDataSize);
                        attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                    }
    
                    if(attackVectorStatus == SystemP_SUCCESS)
                    {
                        status = OSPI_phyTuneDDR(obj->ospiHandle, phyTuningOffset);
                        if(status == SystemP_SUCCESS)
                        {
                            obj->phyEnable = TRUE;
                            OSPI_setPhyEnableSuccess(obj->ospiHandle, TRUE);
                        }
                    }
                    else
                    {
                        DebugP_logError("%s : PHY enabling failed!!! Continuing without PHY...\r\n", __func__);
                        obj->phyEnable = FALSE;
                        OSPI_setPhyEnableSuccess(obj->ospiHandle, FALSE);
                    }
                }
                else
                {
                    obj->phyEnable = FALSE;
                }
            }
        }
        else
        {
            DebugP_logError("%s : Unable to read Flash ID...\r\n", __func__);
        }
    
        /* Any flash specific quirks, like hybrid sector config etc. */
        if(SystemP_SUCCESS == status && params->quirksFxn != NULL)
        {
            params->quirksFxn(config);
        }
        else
        {
            uint8_t regData = 0x00;
    
            /* Read registers and print them consecutively */
            Flash_norOspiRegRead(config, 0x65, 0x00800000, &regData);
            DebugP_log("Status Register 1: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800001, &regData);
            DebugP_log("Status Register 2: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800002, &regData);
            DebugP_log("Configuration Register 1: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800003, &regData);
            DebugP_log("Configuration Register 2: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800004, &regData);
            DebugP_log("Configuration Register 3: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800005, &regData);
            DebugP_log("Configuration Register 4: %u \r\n", regData);
            regData = 0;
            Flash_norOspiRegRead(config, 0x65, 0x00800006, &regData);
            DebugP_log("Configuration Register 5: %u \r\n", regData);
    
        }
    
        return status;
    }

     

    Once you have the changes made, I would like you to build the source libraries, by running the following command.

    Now re-build your applications and bootloader binaries as well.

    Once all of this is done, flash the software again without the --operatio**phy-tuning-da*** line, and share with me the logs which gets generated.

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Below are the steps i followed:

    1. Updated API Flash_norOspiOpen in SDK's flash_nor_ospi.c.

    2. Build the source libraries, by running the mentioned command.

    3. Rebuild "../../examples/drivers/boot/sbl_uart_uniflash_multistage/sbl_uart_uniflash_stage2/am62x-sk/r5fss0-0_nortos/ti-arm-clang/sbl_uart_uniflash_stage2.release.appimage" and "../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage" as i am using default_sbl_null.cfg.

    4. Flashed config default_sbl_null.cfg without "--operation=flash-phy-tuning-data".

    Below are the logs:

    1. Logs for default_sbl_null.cfg flash.

    2. logs for COM Port.

    Once all of this is done, flash the software again without the --operatio**phy-tuning-da*** line, and share with me the logs which gets generated.

    Could you please let me know if these are the logs you mentioned?

    BR,

    Shubham

  • Hi,

    Apologies as I see the logging statements are under the else section which I provided, please replace with the following updated API:

    static int32_t Flash_norOspiOpen(Flash_Config *config, Flash_Params *params)
    {
        int32_t status = SystemP_SUCCESS;
        Flash_NorOspiObject *obj = (Flash_NorOspiObject *)(config->object);
        Flash_Attrs *attrs = config->attrs;
        int32_t attackVectorStatus = SystemP_FAILURE;
        uint32_t readDataCapDelay, phyTuningOffset;
    
        obj->ospiHandle = OSPI_getHandle(attrs->driverInstance);
    
        if(obj->ospiHandle == NULL)
        {
            status = SystemP_FAILURE;
        }
    
        if(SystemP_SUCCESS == status)
        {
            /* Set device size and addressing bytes */
            OSPI_setDeviceSize(obj->ospiHandle, attrs->pageSize, attrs->blockSize);
    
            /* Set command opcode extension type */
            OSPI_setCmdExtType(obj->ospiHandle, config->devConfig->cmdExtType);
    
            /* Set initial number of address bytes */
            obj->numAddrBytes = 3;
    
            /* Set current protocol as 1s1s1s */
            obj->currentProtocol = FLASH_CFG_PROTO_1S_1S_1S;
    
            /* Now configure the flash for the selected protocol */
            status += Flash_norOspiSetProtocol(config, obj->ospiHandle, params);
            obj->currentProtocol = config->devConfig->protocolCfg.protocol;
    
            /* Set number of address bytes. If 4 byte addressing is supported, switch to that */
            status += Flash_norOspiSetAddressBytes(config, obj->ospiHandle);
    
            /* Set opcodes in OSPI controller */
            OSPI_setXferOpCodes(obj->ospiHandle, config->devConfig->protocolCfg.cmdRd, config->devConfig->protocolCfg.cmdWr);
    
            /* Set Mode Clocks and Dummy Clocks in Controller and Flash Memory */
            status += Flash_norOspiSetModeDummy(config, obj->ospiHandle);
    
            /* Set RD Capture Delay by reading manufacture ID and device ID */
            status += Flash_norOspiSetRdDataCaptureDelay(config);
        }
    
        if(SystemP_SUCCESS == status)
        {
            if(SystemP_SUCCESS == OSPI_skipTuning(obj->ospiHandle))
            {
                OSPI_enablePhy(obj->ospiHandle);
    
                /* PHY configuration are already stored and has to be written into register */
                OSPI_phyWriteTunedVal(obj->ospiHandle);
    
                /* Set RD Capture Delay by reading ID */
                readDataCapDelay = 15U;
                OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                while((attackVectorStatus != SystemP_SUCCESS) && (readDataCapDelay > 0U))
                {
                    readDataCapDelay--;
                    OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                }
    
                if(SystemP_SUCCESS == attackVectorStatus)
                {
                    obj->phyEnable = TRUE;
                }
    
                OSPI_disablePhy(obj->ospiHandle);
            }
    
            if(SystemP_SUCCESS != attackVectorStatus || SystemP_SUCCESS != OSPI_skipTuning(obj->ospiHandle))
            {
                /* Enable PHY if attack vector present and PHY mode is enabled */
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                if(OSPI_isPhyEnable(obj->ospiHandle))
                {
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                    if(attackVectorStatus != SystemP_SUCCESS)
                    {
                        /* Flash the attack vector to the last block */
                        uint32_t blk = 0, page = 0;
                        uint32_t phyTuningData = 0,phyTuningDataSize = 0;
                        OSPI_phyGetTuningData(&phyTuningData, &phyTuningDataSize);
                        Flash_offsetToBlkPage(config, phyTuningOffset, &blk, &page);
                        Flash_norOspiErase(config, blk);
                        Flash_norOspiWrite(config, phyTuningOffset, (uint8_t *)phyTuningData, phyTuningDataSize);
                        attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                    }
    
                    if(attackVectorStatus == SystemP_SUCCESS)
                    {
                        status = OSPI_phyTuneDDR(obj->ospiHandle, phyTuningOffset);
                        if(status == SystemP_SUCCESS)
                        {
                            obj->phyEnable = TRUE;
                            OSPI_setPhyEnableSuccess(obj->ospiHandle, TRUE);
                        }
                    }
                    else
                    {
                        DebugP_logError("%s : PHY enabling failed!!! Continuing without PHY...\r\n", __func__);
                        obj->phyEnable = FALSE;
                        OSPI_setPhyEnableSuccess(obj->ospiHandle, FALSE);
                    }
                }
                else
                {
                    obj->phyEnable = FALSE;
                }
            }
        }
        else
        {
            DebugP_logError("%s : Unable to read Flash ID...\r\n", __func__);
        }
    
        /* Any flash specific quirks, like hybrid sector config etc. */
        if(SystemP_SUCCESS == status && params->quirksFxn != NULL)
        {
            params->quirksFxn(config);
        }
        
        uint8_t regData = 0x00;
    
        /* Read registers and print them consecutively */
        Flash_norOspiRegRead(config, 0x65, 0x00800000, &regData);
        DebugP_log("Status Register 1: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800001, &regData);
        DebugP_log("Status Register 2: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800002, &regData);
        DebugP_log("Configuration Register 1: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800003, &regData);
        DebugP_log("Configuration Register 2: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800004, &regData);
        DebugP_log("Configuration Register 3: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800005, &regData);
        DebugP_log("Configuration Register 4: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800006, &regData);
        DebugP_log("Configuration Register 5: %u \r\n", regData);    
    
        return status;
    }

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Please find updated log:

    Please let me know your feedback.

    BR,
    Shubham

  • Hi Shubham,

    Based on the logs, it is prevalent that the Flash part you are working with has been modified before. By modified I mean to say that the status register 1 has been written once before by someone who might have had access to this board.

    Essentially, I see that the status register 1 has the bit LBPROT set as 1, which means:

    So this means that the last 1/64 MB of the flash is protected from writes and erase operation, but you can read from there though.

    So the last 1/64 MB of your flash is basically (1/64) * sizeOfFlash = (1/64) * 64 = 1 MB of the flash. This is 1 MB of the last offsets of the flash part.

    The phy tuning offset is within the last 1 MB, thereby writes to this offset, results in failure.

    Hope this explains the reason behind what you are facing.

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Thanks for the detailed information.

    Can you please suggest us if there is a way to recover it as it is a blocker with SDK 12?

    Thanks in advance.

    BR,
    Shubham

  • Can you please suggest us if there is a way to recover it as it is a blocker with SDK 12?

    Hi Shubham,

    I can then suggest you to do the folllowing.

    Please change the function Flash_norOspiOpen with the following definition for the same.

    What this change will do is, basically going to change the status register 1, LBPROT bit back to 0. This will ensure that the writes to the last 1 MB of the flash works fine.

    Let me share this with you in sometime.

    Regards,

    Vaibhav

  • Could you quickly run the following, I need to check the non-volatile register value as well.

    Thing is we read the volatile Status Register 1 value, which is where we saw the LBPROT bit to be 1.

    So, we have 2 address one for volatile and one for non volatile.

    So for volatile it is 0x800000 \ and for non volatile it is 0x0000.

    So on this note, please re-run using the modified API, which includes just 1 more debug statement. This debug statement will read the SR1's non-volatile register value.

    static int32_t Flash_norOspiOpen(Flash_Config *config, Flash_Params *params)
    {
        int32_t status = SystemP_SUCCESS;
        Flash_NorOspiObject *obj = (Flash_NorOspiObject *)(config->object);
        Flash_Attrs *attrs = config->attrs;
        int32_t attackVectorStatus = SystemP_FAILURE;
        uint32_t readDataCapDelay, phyTuningOffset;
    
        obj->ospiHandle = OSPI_getHandle(attrs->driverInstance);
    
        if(obj->ospiHandle == NULL)
        {
            status = SystemP_FAILURE;
        }
    
        if(SystemP_SUCCESS == status)
        {
            /* Set device size and addressing bytes */
            OSPI_setDeviceSize(obj->ospiHandle, attrs->pageSize, attrs->blockSize);
    
            /* Set command opcode extension type */
            OSPI_setCmdExtType(obj->ospiHandle, config->devConfig->cmdExtType);
    
            /* Set initial number of address bytes */
            obj->numAddrBytes = 3;
    
            /* Set current protocol as 1s1s1s */
            obj->currentProtocol = FLASH_CFG_PROTO_1S_1S_1S;
    
            /* Now configure the flash for the selected protocol */
            status += Flash_norOspiSetProtocol(config, obj->ospiHandle, params);
            obj->currentProtocol = config->devConfig->protocolCfg.protocol;
    
            /* Set number of address bytes. If 4 byte addressing is supported, switch to that */
            status += Flash_norOspiSetAddressBytes(config, obj->ospiHandle);
    
            /* Set opcodes in OSPI controller */
            OSPI_setXferOpCodes(obj->ospiHandle, config->devConfig->protocolCfg.cmdRd, config->devConfig->protocolCfg.cmdWr);
    
            /* Set Mode Clocks and Dummy Clocks in Controller and Flash Memory */
            status += Flash_norOspiSetModeDummy(config, obj->ospiHandle);
    
            /* Set RD Capture Delay by reading manufacture ID and device ID */
            status += Flash_norOspiSetRdDataCaptureDelay(config);
        }
    
        if(SystemP_SUCCESS == status)
        {
            if(SystemP_SUCCESS == OSPI_skipTuning(obj->ospiHandle))
            {
                OSPI_enablePhy(obj->ospiHandle);
    
                /* PHY configuration are already stored and has to be written into register */
                OSPI_phyWriteTunedVal(obj->ospiHandle);
    
                /* Set RD Capture Delay by reading ID */
                readDataCapDelay = 15U;
                OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                while((attackVectorStatus != SystemP_SUCCESS) && (readDataCapDelay > 0U))
                {
                    readDataCapDelay--;
                    OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                }
    
                if(SystemP_SUCCESS == attackVectorStatus)
                {
                    obj->phyEnable = TRUE;
                }
    
                OSPI_disablePhy(obj->ospiHandle);
            }
    
            if(SystemP_SUCCESS != attackVectorStatus || SystemP_SUCCESS != OSPI_skipTuning(obj->ospiHandle))
            {
                /* Enable PHY if attack vector present and PHY mode is enabled */
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                if(OSPI_isPhyEnable(obj->ospiHandle))
                {
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                    if(attackVectorStatus != SystemP_SUCCESS)
                    {
                        /* Flash the attack vector to the last block */
                        uint32_t blk = 0, page = 0;
                        uint32_t phyTuningData = 0,phyTuningDataSize = 0;
                        OSPI_phyGetTuningData(&phyTuningData, &phyTuningDataSize);
                        Flash_offsetToBlkPage(config, phyTuningOffset, &blk, &page);
                        Flash_norOspiErase(config, blk);
                        Flash_norOspiWrite(config, phyTuningOffset, (uint8_t *)phyTuningData, phyTuningDataSize);
                        attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                    }
    
                    if(attackVectorStatus == SystemP_SUCCESS)
                    {
                        status = OSPI_phyTuneDDR(obj->ospiHandle, phyTuningOffset);
                        if(status == SystemP_SUCCESS)
                        {
                            obj->phyEnable = TRUE;
                            OSPI_setPhyEnableSuccess(obj->ospiHandle, TRUE);
                        }
                    }
                    else
                    {
                        DebugP_logError("%s : PHY enabling failed!!! Continuing without PHY...\r\n", __func__);
                        obj->phyEnable = FALSE;
                        OSPI_setPhyEnableSuccess(obj->ospiHandle, FALSE);
                    }
                }
                else
                {
                    obj->phyEnable = FALSE;
                }
            }
        }
        else
        {
            DebugP_logError("%s : Unable to read Flash ID...\r\n", __func__);
        }
    
        /* Any flash specific quirks, like hybrid sector config etc. */
        if(SystemP_SUCCESS == status && params->quirksFxn != NULL)
        {
            params->quirksFxn(config);
        }
        
        uint8_t regData = 0x00;
    
        /* Read registers and print them consecutively */
        Flash_norOspiRegRead(config, 0x65, 0x00800000, &regData);
        DebugP_log("Status Register 1: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00, &regData);
        DebugP_log("Status Register 1 - non-volatile address value: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800001, &regData);
        DebugP_log("Status Register 2: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800002, &regData);
        DebugP_log("Configuration Register 1: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800003, &regData);
        DebugP_log("Configuration Register 2: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800004, &regData);
        DebugP_log("Configuration Register 3: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800005, &regData);
        DebugP_log("Configuration Register 4: %u \r\n", regData);
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800006, &regData);
        DebugP_log("Configuration Register 5: %u \r\n", regData);    
    
        return status;
    }

  • Hi Vaibhav,

    Please find the updated logs:

    BR,
    Shubham

  • Hi Shubham,

    I see that the non volatile value for SR1 is 0.

    Which means at PORz, the NV contents gets coped to V register, and then the rest of the operations follow.

    I suspect that there is something in your code which is changing the Status Register 1 field.

    If there are multiple members working in your team, could you please cross check with someone as to if any changes have been made to any part of the code, could be at the application layer, driver or board layer.

    If there is absolutely no change, do let me know, then I can suggest a fix for this.

    Regards,

    Vaibhav

  • Hi Vaibhav,

    If there are multiple members working in your team, could you please cross check with someone as to if any changes have been made to any part of the code, could be at the application layer, driver or board layer.

    I discussed with other colleague who is working on the same project, but there is no such changes performed.

    If there is absolutely no change, do let me know, then I can suggest a fix for this.

    Yes please.. it will be helpful.

    BR,
    Shubham

  • Hi Shubham,

    I think there is some part of the code in SDK 12 which is writing to the status register.

    Let me check if there is anything like this which exists.

    Once I have more clarity I will respond back to you.

    Regards,

    Vaibhav

  • Interesting, no function is writing to the status register 1, I wonder how its being written to despite no API touching the status register 1.

    The only way to move forward for this flash part would be to write 0 to the LBPROT bit.

    In the Flash_norOspiOpen API, I would like you to introduce this write API which will write to the Status Register 1.

    static int32_t Flash_norOspiOpen(Flash_Config *config, Flash_Params *params)
    {
        int32_t status = SystemP_SUCCESS;
        Flash_NorOspiObject *obj = (Flash_NorOspiObject *)(config->object);
        Flash_Attrs *attrs = config->attrs;
        int32_t attackVectorStatus = SystemP_FAILURE;
        uint32_t readDataCapDelay, phyTuningOffset;
    
        obj->ospiHandle = OSPI_getHandle(attrs->driverInstance);
    
        if(obj->ospiHandle == NULL)
        {
            status = SystemP_FAILURE;
        }
    
        if(SystemP_SUCCESS == status)
        {
            /* Set device size and addressing bytes */
            OSPI_setDeviceSize(obj->ospiHandle, attrs->pageSize, attrs->blockSize);
    
            /* Set command opcode extension type */
            OSPI_setCmdExtType(obj->ospiHandle, config->devConfig->cmdExtType);
    
            /* Set initial number of address bytes */
            obj->numAddrBytes = 3;
    
            /* Set current protocol as 1s1s1s */
            obj->currentProtocol = FLASH_CFG_PROTO_1S_1S_1S;
    
            /* Now configure the flash for the selected protocol */
            status += Flash_norOspiSetProtocol(config, obj->ospiHandle, params);
            obj->currentProtocol = config->devConfig->protocolCfg.protocol;
    
            /* Set number of address bytes. If 4 byte addressing is supported, switch to that */
            status += Flash_norOspiSetAddressBytes(config, obj->ospiHandle);
    
            /* Set opcodes in OSPI controller */
            OSPI_setXferOpCodes(obj->ospiHandle, config->devConfig->protocolCfg.cmdRd, config->devConfig->protocolCfg.cmdWr);
    
            /* Set Mode Clocks and Dummy Clocks in Controller and Flash Memory */
            status += Flash_norOspiSetModeDummy(config, obj->ospiHandle);
    
            /* Set RD Capture Delay by reading manufacture ID and device ID */
            status += Flash_norOspiSetRdDataCaptureDelay(config);
        }
    
        if(SystemP_SUCCESS == status)
        {
            if(SystemP_SUCCESS == OSPI_skipTuning(obj->ospiHandle))
            {
                OSPI_enablePhy(obj->ospiHandle);
    
                /* PHY configuration are already stored and has to be written into register */
                OSPI_phyWriteTunedVal(obj->ospiHandle);
    
                /* Set RD Capture Delay by reading ID */
                readDataCapDelay = 15U;
                OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                while((attackVectorStatus != SystemP_SUCCESS) && (readDataCapDelay > 0U))
                {
                    readDataCapDelay--;
                    OSPI_setRdDataCaptureDelay(obj->ospiHandle, readDataCapDelay, TRUE);
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                }
    
                if(SystemP_SUCCESS == attackVectorStatus)
                {
                    obj->phyEnable = TRUE;
                }
    
                OSPI_disablePhy(obj->ospiHandle);
            }
    
            if(SystemP_SUCCESS != attackVectorStatus || SystemP_SUCCESS != OSPI_skipTuning(obj->ospiHandle))
            {
                /* Enable PHY if attack vector present and PHY mode is enabled */
                phyTuningOffset = Flash_getPhyTuningOffset(config);
                if(OSPI_isPhyEnable(obj->ospiHandle))
                {
                    attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
    
                    if(attackVectorStatus != SystemP_SUCCESS)
                    {
                        /* Flash the attack vector to the last block */
                        uint32_t blk = 0, page = 0;
                        uint32_t phyTuningData = 0,phyTuningDataSize = 0;
                        OSPI_phyGetTuningData(&phyTuningData, &phyTuningDataSize);
                        Flash_offsetToBlkPage(config, phyTuningOffset, &blk, &page);
                        Flash_norOspiErase(config, blk);
                        Flash_norOspiWrite(config, phyTuningOffset, (uint8_t *)phyTuningData, phyTuningDataSize);
                        attackVectorStatus = OSPI_phyReadAttackVector(obj->ospiHandle, phyTuningOffset);
                    }
    
                    if(attackVectorStatus == SystemP_SUCCESS)
                    {
                        status = OSPI_phyTuneDDR(obj->ospiHandle, phyTuningOffset);
                        if(status == SystemP_SUCCESS)
                        {
                            obj->phyEnable = TRUE;
                            OSPI_setPhyEnableSuccess(obj->ospiHandle, TRUE);
                        }
                    }
                    else
                    {
                        DebugP_logError("%s : PHY enabling failed!!! Continuing without PHY...\r\n", __func__);
                        obj->phyEnable = FALSE;
                        OSPI_setPhyEnableSuccess(obj->ospiHandle, FALSE);
                    }
                }
                else
                {
                    obj->phyEnable = FALSE;
                }
            }
        }
        else
        {
            DebugP_logError("%s : Unable to read Flash ID...\r\n", __func__);
        }
    
        /* Any flash specific quirks, like hybrid sector config etc. */
        if(SystemP_SUCCESS == status && params->quirksFxn != NULL)
        {
            params->quirksFxn(config);
        }
        
        uint8_t regData = 0x00;
    
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800000, &regData);
        DebugP_log("Status Register 1: %u \r\n", regData);
        
        regData &= ~(0x1C); // setting bits[4:2] LBPROT to 0
        Flash_norOspiRegWrite(config, 0x71, 0x00800000, regData);
    
        regData = 0;
        Flash_norOspiRegRead(config, 0x65, 0x00800000, &regData);
        DebugP_log("New Status Register 1 value after setting LBPROT to 0: %u \r\n", regData);       
    
        return status;
    }

    After this, rebuild your drivers, flash board layers, all of your applications and test out if it works.

    Looking forward to your response.

  • Hi Vaibhav,

    Thanks for the inputs.. Sorry for the delayed response as the hardware is available on sharing basis.

    Now with updated API Flash_norOspiOpen, we are able to write 0 to the LBPROT bit and expected logs:

    Could you please let me know if we have to set it every time with API Flash_norOspiOpen for different SDK's 11.0, 12.0.. as we tried to build the SDK images with default cfg and it failed with the same reason.

    BR,
    Shubham

  • Hi Shubham,

    Could you please let me know if we have to set it every time with API Flash_norOspiOpen for different SDK's 11.0, 12.0.. as we tried to build the SDK images with default cfg and it failed with the same reason.

    Looks like yes for now.

    I am going to discuss this with the development team, but most probably for this board you can use the changes I shared.

    The change is just setting LBPROT bit 2:4 to 0.

    This ensures the last 1 MB of the flash is not protected from program operations, that is, erase and writes.

    Regards,

    Vaibhav

  • Hi Vaibhav,

    Looks like yes for now.

    I am going to discuss this with the development team, but most probably for this board you can use the changes I shared.

    The change is just setting LBPROT bit 2:4 to 0.

    This ensures the last 1 MB of the flash is not protected from program operations, that is, erase and writes.

    Sure.. Thanks for the confirmation.

    We will continue with setting LBPROT bit 2:4 to 0 in API Flash_norOspiOpen for SDK 12.0 as well.. Please let us know in case there is any update from development team.

    Thanks a lot again for your support during entire discussion.

    BR,
    Shubham

  • Hi Vaibhav,

    We are updating SDK to mcu_plus_sdk_am62x_12_00_00_27 and while flashing default_sbl_null.cfg the control is stuck at 3rd command execution:

    We tried with above workaround and also removing "--operation=flash-phy-tuning-data", but the control is stuck at 3rd step again:

    Could you please provide your feedback if any additional points to be taken care based on SDK mcu_plus_sdk_am62x_12_00_00_27 updates.

    BR,

    Shubham

  • Hi,

    Let me look into this.

    Regards,

    Vaibhav

  • Hi Shubham,

    I have gone through this thread, and the default SDK does not set the LBPROT bit to 1 in any of the applications.

    However, can you try using a fresh mcu_plus_sdk_am62x_12_00_00_27 with no changes made (keep everything as default), and try flashing the application images?

    Since you are using the default Flash part - S28HS512T, flashing the application images with the latest SDK should not have any issues.

    Regards,

    Aryamaan

  • Hi Aryamaan,

    I have gone through this thread, and the default SDK does not set the LBPROT bit to 1 in any of the applications.

    However, can you try using a fresh mcu_plus_sdk_am62x_12_00_00_27 with no changes made (keep everything as default), and try flashing the application images?

    I have tried using a fresh mcu_plus_sdk_am62x_12_00_00_27 with no changes and above (in my previous comment) are the logs for the same.. after that i tried with the modifications suggested by Vaibhav for API Flash_norOspiOpen, and there is no change on the logs.

    BR,
    Shubham

  • Hi Shubham,

    In the SysConfig file of the latest SDK, can you remove the below 2 custom functions for each application being flashed and try again?

    Change:

    to this:

    The safeBootdetection function resets the configuration registers, which might result in the issue which you are facing.

    Regards,

    Aryamaan

  • Hi Aryamaan,

    Thanks for your inputs.

    I am using command line to flash sbl image, so i removed the content of functions Flash_quirkSpansionSafebootDetection and Flash_quirkSpansionConfigureLayout in flash_nor_ospi.c and rebuild all the required images.

    Now i am able to flash the sbl image for SDK 12.0 as well.

    Could you please provide your feedback on flashing failure with above mentioned function for our board.. if we need to remove these functions always or any specific reason of failure on our board? 

    BR,
    Shubham

  • Hi Shubham,

    Im glad to know that the application images are being flashed successfully.

    The above two functions which I suggested for you to comment out are functions which reset the configuration registers and configures the Flash in its default state.

    However, in your case, we needed the Flash to work in a modified state, particularly, the state where we are manually setting the LBPROT bit to 0.

    Hence, the above two functions needed to be removed.

    Please note, the above two functions have no direct effect on the workings of the Flash operations, these two functions are just used to recover the Flash from an unknown state to a known state which is the default state of the Flash.

    Regards,

    Aryamaan

  • Hi Aryamaan,

    The above two functions which I suggested for you to comment out are functions which reset the configuration registers and configures the Flash in its default state.

    However, in your case, we needed the Flash to work in a modified state, particularly, the state where we are manually setting the LBPROT bit to 0.

    Hence, the above two functions needed to be removed.

    Thanks for the confirmation.

    BR,
    Shubham