Part Number: AM625
DDR ECC [1] on the TI AM62x SoC operates using an inline ECC mechanism. Unlike traditional server-grade systems that require a dedicated 9th memory chip, the AM62x stores Error Correction Code (ECC) data directly within the standard SDRAM memory space.
Storage Efficiency: The system uses a 1/9th ratio for ECC storage. For every 256-byte data block, 32 bytes are used for ECC, leaving 8/9ths of the total SDRAM space available for system use.
SECDED Protection: It implements an 8-bit Single Error Correction Double Error Detection (SECDED) code calculated over 64-bit data.
- 1-bit errors: Automatically corrected by the hardware.
- 2-bit (or multi-bit) errors: Detected but not correctable, typically triggering a system exception or reset.
Address Space: To the software, the 8/9ths available space appears as a continuous, consecutive block of memory addresses.
- The AM62-SIP evaluation module [2]. It is a stand-alone test and development platform built around the AM6254 system-on-a-chip (SoC) with integrated 512 MB LPDDR4 SDRAM in a single package.
- The available DDR size is reduced to 448MiB from 512MiB once the DDR ECC feature is enabled on the AM62-SIP board. We'll have to adjust the default DM firmware memory map, and rebuild the DM firmware to work with the reduced DDR memory.
The FAQ lists the steps using AM62x Linux SDK 12.0.0.7.4 [3] as an example
- how to modify the the default DM firmware memory map, and rebuild the DM firmware to work with the reduced DDR memory.
- how to adjust u-boot & kernel reserved memory map to work with the modified DM firmware memory map
[1]. https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/latest/exports/docs/linux/Foundational_Components/U-Boot/UG-DDRSS.html
[2]. https://www.ti.com/tool/SK-AM62-SIP
[3]. https://www.ti.com/tool/download/PROCESSOR-SDK-LINUX-AM62X/12.00.00.07.04
