Part Number: AM62P
Hi,
I want to use use Windowed Watchdog Timer to generate reset via not servicing the watchdog on time. The example I am using is "rti_app_uc1" from "mcu_plus_sdk_am62px_11_01_01_08/examples/sdl/rti/UC1". I have configured the WWD reaction to GENERATE_RESET via modifying the code as follows.
/* Configure RTI parameters */
pConfig.SDL_RTI_dwwdPreloadVal = RTIGetPreloadValue(RTI_CLOCK_SOURCE_32KHZ, RTI_WDT_TIMEOUT);
pConfig.SDL_RTI_dwwdWindowSize = RTI_DWWD_WINDOWSIZE_100_PERCENT;
pConfig.SDL_RTI_dwwdReaction = RTI_DWWD_REACTION_GENERATE_RESET;The time interval I configured for WWD is 3s. After I start the WWD, I implement a 4s delay to generate a WWD timeout. But I find the timeout dose not trigger the MCU reset and the code could continue run.
I attach the related code and logs below.
int32_t SDL_RTI_exampleTest(void)
{
uint32_t rtiModuleBase;
uint32_t closedWinStatus;
int32_t retVal = SDL_PASS;
SDL_RTI_configParms pConfig;
SDL_RTI_staticRegs pStaticRegs;
#if defined (SOC_AM62X)
#if defined (M4F_CORE)
rtiModuleBase = SDL_MCU_RTI0_CFG_BASE;
#endif
#if defined (R5F_CORE)
rtiModuleBase = SDL_WKUP_RTI0_CFG_BASE;
#endif
#endif
#if defined (SOC_AM62AX) || defined (SOC_AM62PX) || defined (SOC_AM62DX) || defined (SOC_J722S)
rtiModuleBase = SDL_MCU_RTI0_CFG_BASE;
#endif
#if defined (SOC_AM275X)
rtiModuleBase = SDL_WKUP_RTI0_CFG_BASE;
#endif
DebugP_log("RTI Example code UC-1 started\r\n");
/* Register Interrupt */
isrFlag = RTI_NO_INTERRUPT;
/* Configure RTI parameters */
pConfig.SDL_RTI_dwwdPreloadVal = RTIGetPreloadValue(RTI_CLOCK_SOURCE_32KHZ, RTI_WDT_TIMEOUT);
pConfig.SDL_RTI_dwwdWindowSize = RTI_DWWD_WINDOWSIZE_100_PERCENT;
pConfig.SDL_RTI_dwwdReaction = RTI_DWWD_REACTION_GENERATE_RESET;
/* Select RTI module clock source */
RTISetClockSource(rtiModuleBase, RTI_CLOCK_SOURCE_32KHZ);
#if defined (SOC_AM62X)
#if defined (M4F_CORE)
retVal = SDL_RTI_config(SDL_INSTANCE_MCU_RTI0_CFG, &pConfig);
#endif
#if defined (R5F_CORE)
retVal = SDL_RTI_config(SDL_INSTANCE_WKUP_RTI0, &pConfig);
#endif
#endif
#if defined (SOC_AM62AX) || defined (SOC_AM62PX) || defined (SOC_AM62DX) || defined (SOC_J722S)
retVal = SDL_RTI_config(SDL_INSTANCE_MCU_RTI0_CFG, &pConfig);
#endif
#if defined (SOC_AM275X)
retVal = SDL_RTI_config(SDL_INSTANCE_WKUP_RTI0, &pConfig);
#endif
if (retVal == SDL_EFAIL)
{
DebugP_log("Error during Window configuration.\r\n");
}
/* Verify the config */
#if defined (SOC_AM62X)
#if defined (M4F_CORE)
retVal = SDL_RTI_verifyConfig(SDL_INSTANCE_MCU_RTI0_CFG, &pConfig);
#endif
#if defined (R5F_CORE)
retVal = SDL_RTI_verifyConfig(SDL_INSTANCE_WKUP_RTI0, &pConfig);
#endif
#endif
#if defined (SOC_AM62AX) || defined (SOC_AM62PX) || defined (SOC_AM62DX) || defined (SOC_J722S)
retVal = SDL_RTI_verifyConfig(SDL_INSTANCE_MCU_RTI0_CFG, &pConfig);
#endif
#if defined (SOC_AM275X)
retVal = SDL_RTI_verifyConfig(SDL_INSTANCE_WKUP_RTI0, &pConfig);
#endif
if (retVal == SDL_EFAIL)
{
DebugP_log("Error during Window Verify configuration.\r\n");
}
if (retVal == SDL_PASS)
{
#if defined (SOC_AM62X)
#if defined (M4F_CORE)
SDL_RTI_readStaticRegs(SDL_INSTANCE_MCU_RTI0_CFG, &pStaticRegs);
#endif
#if defined (R5F_CORE)
SDL_RTI_readStaticRegs(SDL_INSTANCE_WKUP_RTI0, &pStaticRegs);
#endif
#endif
#if defined (SOC_AM62AX) || defined (SOC_AM62PX) || defined (SOC_AM62DX) || defined (SOC_J722S)
SDL_RTI_readStaticRegs(SDL_INSTANCE_MCU_RTI0_CFG, &pStaticRegs);
#endif
#if defined (SOC_AM275X)
SDL_RTI_readStaticRegs(SDL_INSTANCE_WKUP_RTI0, &pStaticRegs);
#endif
switch(pStaticRegs.RTI_WWDSIZECTRL)
{
case RTI_RTIDWWDSIZECTRL_DWWDSIZE_100_PERCENT:
DebugP_log(" DWWD configured to 100 percent window size\r\n");
break;
case RTI_RTIDWWDSIZECTRL_DWWDSIZE_50_PERCENT:
DebugP_log(" DWWD configured to 50 percent window size\r\n");
break;
case RTI_RTIDWWDSIZECTRL_DWWDSIZE_25_PERCENT:
DebugP_log(" DWWD configured to 25 percent window size\r\n");
break;
case RTI_RTIDWWDSIZECTRL_DWWDSIZE_12_5_PERCENT:
DebugP_log(" DWWD configured to 6.25 percent window size\r\n");
break;
case RTI_RTIDWWDSIZECTRL_DWWDSIZE_6_25_PERCENT:
DebugP_log(" DWWD configured to 3.125 percent window size\r\n");
break;
}
DebugP_log(" DWWD is configured for %u ms time-out \r\n", RTI_WDT_TIMEOUT);
/* UC1: Configure RTI and servicing for some time */
DebugP_log("\r\nRTI DWWD proper servicing test running. \r\n");
DebugP_log(" Please wait for max %d ms. \r\n\r\n", RTI_WDT_TIMEOUT);
isrFlag = RTI_NO_INTERRUPT;
SDL_RTI_start(SDL_INSTANCE_MCU_RTI0_CFG);
/* Servicing DWWD before testing for window end */
RTIDwwdIsClosedWindow(rtiModuleBase, &closedWinStatus);
while (closedWinStatus == TRUE)
{
RTIDwwdIsClosedWindow(rtiModuleBase, &closedWinStatus);
/* Keep checking till window is open. */
SDL_DPL_delay(1U);
}
DebugP_log("Not servicing the WWD on time... \r\n");
SDL_DPL_delay(4);
DebugP_log("whether could be here? \r\n");
// SDL_RTI_service(SDL_INSTANCE_MCU_RTI0_CFG);
if (isrFlag != RTI_NO_INTERRUPT)
{
/* DWWD interrupt is generated when it is not expected to. */
retVal = SDL_EFAIL;
}
if (retVal == SDL_PASS)
{
DebugP_log("RTI DWWD proper servicing test successful. \r\n\r\n");
}
else
{
DebugP_log("RTI DWWD proper servicing test failed. \r\n");
}
/* UC1: RTI is configured to 100% window size and starting the DWWD but not servicing,
this will expire the window period and it will generate interrupt to ESM and
thus result in permanant failure */
DebugP_log("\r\nRTI permanent failure test running. \r\n");
DebugP_log(" DWWD will generate interrupt after %d seconds\r\n", (RTI_WDT_TIMEOUT/1000));
BR,
Bomiao
