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AM623: AM6234 SD Card DDR50 speed boot problem

neil chen
Prodigy 150 points

Part Number: AM623
Other Parts Discussed in Thread: SK-AM62, SK-AM62B, TPS65219

We are currently working on a custom board using the AM6234 processor. We are experiencing issues when attempting to boot from an SD card using DDR50 mode.

While the system boots successfully in High Speed (HS) mode, switching to DDR50 results in the initialization errors shown in the log below.

Hardware Configurations & Observations:

Voltage: We have confirmed that the SD card I/O voltage successfully switches and drops to 1.8V for the higher speed modes.

Schematic: The interface circuitry for the SD card signals is designed following the AM62x EVM (SK-AM62) reference.

Status: High Speed mode is stable, but DDR50 fails consistently.

Error Log:

U-Boot SPL 2025.01-gd2a72467939e-dirty (Mar 26 2026 - 16:32:58 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
Changed A53 CPU frequency to 1250000000Hz (T grade) in DT
SPL initial stack usage: 13392 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.13.0(release):v2.13.0-240-gd90bb650fe-dirty
NOTICE:  BL31: Built : 21:37:18, Jun 23 2025

U-Boot SPL 2025.01-gd2a72467939e-dirty (Mar 26 2026 - 16:36:07 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
SPL initial stack usage: 2032 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed


U-Boot 2025.01-gd2a72467939e-dirty (Mar 26 2026 - 16:36:07 +0800)

SoC:   AM62X SR1.0 HS-FS
Model: Texas Instruments AM625 SK
DRAM:  2 GiB
Core:  83 devices, 32 uclasses, devicetree: separate
MMC:   mmc@fa10000: 0, mmc@fa00000: 1
Loading Environment from SPIFlash... SF: Detected w25q64dw with page size 256 Bytes, erase size 4 KiB, total 8 MiB
OK
In:    serial
Out:   serial
Err:   serial
Net:   Ethaddr Address in environment is        00:19:15:f4:5c:4e
eth0: ethernet@8000000port@1

Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc1 is current device
SD/MMC found on device 1
574 bytes read in 1 ms (560.5 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc1 ...
19511808 bytes read in 810 ms (23 MiB/s)
62679 bytes read in 6 ms (10 MiB/s)
Working FDT set to 88000000
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
   Loading Device Tree to 000000008feed000, end 000000008fffffff ... OK
Working FDT set to 8feed000

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 6.12.35-tecom+ (tecom@ubuntu-2204) (aarch64-oe-linux-gcc (GCC) 13.4.0, GNU ld (GNU Binutils) 2.42.0.20240723) #16 SMP PREEMPT_RT Thu Jan 22 14:48:57 CST 2026
[    0.000000] Machine model: Texas Instruments AM625 SK
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.000000] printk: legacy bootconsole [ns16550a0] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created CMA memory pool at 0x00000000f7600000, size 128 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x00000000f7600000..0x00000000ff5fffff (131072 KiB) map reusable linux,cma
[    0.000000] OF: reserved mem: 0x000000009e800000..0x000000009fffffff (24576 KiB) nomap non-reusable optee@9e800000
[    0.000000] OF: reserved mem: 0x0000000080000000..0x000000008007ffff (512 KiB) nomap non-reusable tfa@80000000
[    0.000000] OF: reserved mem: 0x00000000ff700000..0x00000000ffffffff (9216 KiB) nomap non-reusable framebuffer@ff700000
[    0.000000] OF: reserved mem: 0x000000009c700000..0x000000009c7fffff (1024 KiB) map non-reusable ramoops@9c700000
[    0.000000] Reserved memory: created DMA memory pool at 0x000000009c800000, size 3 MiB
[    0.000000] OF: reserved mem: initialized node ipc-memories@9c800000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x000000009c800000..0x000000009cafffff (3072 KiB) nomap non-reusable ipc-memories@9c800000
[    0.000000] Reserved memory: created DMA memory pool at 0x000000009cb00000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node m4f-dma-memory@9cb00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x000000009cb00000..0x000000009cbfffff (1024 KiB) nomap non-reusable m4f-dma-memory@9cb00000
[    0.000000] Reserved memory: created DMA memory pool at 0x000000009cc00000, size 14 MiB
[    0.000000] OF: reserved mem: initialized node m4f-memory@9cc00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x000000009cc00000..0x000000009d9fffff (14336 KiB) nomap non-reusable m4f-memory@9cc00000
[    0.000000] Reserved memory: created DMA memory pool at 0x000000009da00000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@9da00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x000000009da00000..0x000000009dafffff (1024 KiB) nomap non-reusable r5f-dma-memory@9da00000
[    0.000000] Reserved memory: created DMA memory pool at 0x000000009db00000, size 12 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@9db00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x000000009db00000..0x000000009e6fffff (12288 KiB) nomap non-reusable r5f-memory@9db00000
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000008007ffff]
[    0.000000]   node   0: [mem 0x0000000080080000-0x000000009c7fffff]
[    0.000000]   node   0: [mem 0x000000009c800000-0x000000009e6fffff]
[    0.000000]   node   0: [mem 0x000000009e700000-0x000000009e7fffff]
[    0.000000]   node   0: [mem 0x000000009e800000-0x000000009fffffff]
[    0.000000]   node   0: [mem 0x00000000a0000000-0x00000000ff6fffff]
[    0.000000]   node   0: [mem 0x00000000ff700000-0x00000000ffffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.5
[    0.000000] percpu: Embedded 23 pages/cpu s54704 r8192 d31312 u94208
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: kernel page table isolation disabled by kernel configuration
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] alternatives: applying boot alternatives
[    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 mtdparts=spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern) lot=26D1 product=SDX500P root=PARTUUID=076c4a2a-02 rw rootfstype=ext4 rootwait
[    0.000000] Unknown kernel command line parameters "mtdparts=spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern) lot=26D1 product=SDX500P", will be passed to user space.
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 524288
[    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[    0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 2MB
[    0.000000] software IO TLB: area num 4.
[    0.000000] software IO TLB: mapped [mem 0x00000000f5100000-0x00000000f5300000] (2MB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=4.
[    0.000000] rcu:     RCU_SOFTIRQ processing moved to rcuc kthreads.
[    0.000000]  No expedited grace period (rcu_normal_after_boot).
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: 0xffff8000800100bc
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=1
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001880000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80c00000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x0000000080440000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080450000
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000000] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.000386] Console: colour dummy device 80x25
[    0.000453] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=200000)
[    0.000471] pid_max: default: 32768 minimum: 301
[    0.000558] LSM: initializing lsm=capability
[    0.000760] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.000791] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.003282] rcu: Hierarchical SRCU implementation.
[    0.003293] rcu:     Max phase no-delay instances is 400.
[    0.073811] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
[    0.095376] EFI services will not be available.
[    0.153728] smp: Bringing up secondary CPUs ...
[    0.260767] Detected VIPT I-cache on CPU1
[    0.260889] GICv3: CPU1: found redistributor 1 region 0:0x00000000018a0000
[    0.260913] GICv3: CPU1: using allocated LPI pending table @0x0000000080460000
[    0.260976] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.429474] Detected VIPT I-cache on CPU2
[    0.429567] GICv3: CPU2: found redistributor 2 region 0:0x00000000018c0000
[    0.429589] GICv3: CPU2: using allocated LPI pending table @0x0000000080470000
[    0.429634] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[    0.552433] Detected VIPT I-cache on CPU3
[    0.552524] GICv3: CPU3: found redistributor 3 region 0:0x00000000018e0000
[    0.552538] GICv3: CPU3: using allocated LPI pending table @0x0000000080480000
[    0.552582] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[    0.567226] smp: Brought up 1 node, 4 CPUs
[    0.567233] SMP: Total of 4 processors activated.
[    0.567236] CPU: All CPU(s) started at EL2
[    0.567240] CPU features: detected: 32-bit EL0 Support
[    0.567244] CPU features: detected: CRC32 instructions
[    0.625347] alternatives: applying system-wide alternatives
[    0.646877] Memory: 1832072K/2097152K available (11648K kernel code, 1454K rwdata, 3096K rodata, 2752K init, 635K bss, 125520K reserved, 131072K cma-reserved)
[    0.655426] devtmpfs: initialized
[    0.668074] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[    0.668112] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[    0.674528] 27824 pages in range for non-PLT usage
[    0.674557] 519344 pages in range for PLT usage
[    0.674939] pinctrl core: initialized pinctrl subsystem
[    0.675791] DMI not present or invalid.
[    0.676642] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.678411] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0.678690] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.679016] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.679536] audit: initializing netlink subsys (disabled)
[    0.679832] audit: type=2000 audit(0.677:1): state=initialized audit_enabled=0 res=1
[    0.680561] thermal_sys: Registered thermal governor 'step_wise'
[    0.680839] ASID allocator initialised with 65536 entries
[    0.686499] /bus@f0000/interrupt-controller@1800000: Fixed dependency cycle(s) with /bus@f0000/interrupt-controller@1800000
[    0.686619] /bus@f0000/i2c@20000000/tps6598x@3f/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
[    0.686725] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20000000/tps6598x@3f/connector
[    0.692404] /bus@f0000/i2c@20000000/tps6598x@3f/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
[    0.693635] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20000000/tps6598x@3f/connector
[    0.699231] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[    0.699243] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[    0.699248] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[    0.699257] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[    0.699261] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[    0.699264] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[    0.699268] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[    0.699271] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[    1.072078] k3-chipinfo 43000014.chipid: Family:AM62X rev:SR1.0 JTAGID[0x0bb7e02f] Detected
[    1.074768] iommu: Default domain type: Translated
[    1.074792] iommu: DMA domain TLB invalidation policy: strict mode
[    1.075480] SCSI subsystem initialized
[    1.076009] usbcore: registered new interface driver usbfs
[    1.076056] usbcore: registered new interface driver hub
[    1.076091] usbcore: registered new device driver usb
[    1.076741] pps_core: LinuxPPS API ver. 1 registered
[    1.076747] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    1.076766] PTP clock support registered
[    1.076816] EDAC MC: Ver: 3.0.0
[    1.077278] scmi_core: SCMI protocol bus registered
[    1.077704] FPGA manager framework
[    1.077842] Advanced Linux Sound Architecture Driver Initialized.
[    1.081416] vgaarb: loaded
[    1.081860] clocksource: Switched to clocksource arch_sys_counter
[    1.082370] VFS: Disk quotas dquot_6.6.0
[    1.082451] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    1.091288] NET: Registered PF_INET protocol family
[    1.091614] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    1.093313] tcp_listen_portaddr_hash hash table entries: 1024 (order: 3, 40960 bytes, linear)
[    1.093408] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    1.093421] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    1.093711] TCP bind hash table entries: 16384 (order: 8, 1310720 bytes, linear)
[    1.095545] TCP: Hash tables configured (established 16384 bind 16384)
[    1.095843] UDP hash table entries: 1024 (order: 4, 98304 bytes, linear)
[    1.096115] UDP-Lite hash table entries: 1024 (order: 4, 98304 bytes, linear)
[    1.096560] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    1.097280] RPC: Registered named UNIX socket transport module.
[    1.097289] RPC: Registered udp transport module.
[    1.097292] RPC: Registered tcp transport module.
[    1.097294] RPC: Registered tcp-with-tls transport module.
[    1.097297] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    1.097322] PCI: CLS 0 bytes, default 64
[    1.099072] Initialise system trusted keyrings
[    1.099362] workingset: timestamp_bits=62 max_order=19 bucket_order=0
[    1.099778] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    1.100200] NFS: Registering the id_resolver key type
[    1.100241] Key type id_resolver registered
[    1.100244] Key type id_legacy registered
[    1.100266] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    1.100278] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    1.100304] ntfs3: Enabled Linux POSIX ACLs support
[    1.100306] ntfs3: Warning: Activated 64 bits per cluster. Windows does not support this
[    1.151004] Key type asymmetric registered
[    1.151023] Asymmetric key parser 'x509' registered
[    1.151128] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
[    1.151139] io scheduler mq-deadline registered
[    1.151143] io scheduler kyber registered
[    1.151181] io scheduler bfq registered
[    1.155649] pinctrl-single 4084000.pinctrl: 34 pins, size 136
[    1.156507] pinctrl-single f4000.pinctrl: 171 pins, size 684
[    1.166485] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    1.180036] loop: module loaded
[    1.181538] megasas: 07.727.03.00-rc1
[    1.186939] tun: Universal TUN/TAP device driver, 1.6
[    1.187753] PPP generic driver version 2.4.2
[    1.188112] PPP BSD Compression module registered
[    1.188119] PPP Deflate Compression module registered
[    1.188163] PPP MPPE Compression module registered
[    1.188168] NET: Registered PF_PPPOX protocol family
[    1.188642] VFIO - User Level meta-driver version: 0.3
[    1.190302] usbcore: registered new interface driver usb-storage
[    1.191127] i2c_dev: i2c /dev entries driver
[    1.191967] sdhci: Secure Digital Host Controller Interface driver
[    1.191971] sdhci: Copyright(c) Pierre Ossman
[    1.192217] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.192999] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    1.194230] usbcore: registered new interface driver usbhid
[    1.194237] usbhid: USB HID core driver
[    1.195402] optee: probing for conduit method.
[    1.195453] optee: revision 4.6 (71785645fa6ce42d)
[    1.195998] optee: dynamic shared memory is enabled
[    1.196934] optee: initialized driver
[    1.197026] random: crng init done
[    1.201164] xt_time: kernel timezone is -0000
[    1.201446] NET: Registered PF_PACKET protocol family
[    1.201544] Key type dns_resolver registered
[    1.213113] Loading compiled-in X.509 certificates
[    1.229988] ti-sci 44043000.system-controller: ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
[    1.298108] /bus@f0000/i2c@20000000/tps6598x@3f/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
[    1.298226] omap_i2c 20000000.i2c: bus 0 rev0.12 at 400 kHz
[    1.300289] omap_i2c 20010000.i2c: bus 1 rev0.12 at 100 kHz
[    1.301687] omap_i2c 20020000.i2c: bus 2 rev0.12 at 400 kHz
[    1.302075] ti-sci-intr bus@f0000:interrupt-controller@a00000: Interrupt Router 3 domain created
[    1.302404] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
[    1.304227] ti-udma 485c0100.dma-controller: Number of rings: 82
[    1.307955] ti-udma 485c0100.dma-controller: Channels: 48 (bchan: 18, tchan: 12, rchan: 18)
[    1.311784] ti-udma 485c0000.dma-controller: Number of rings: 150
[    1.318723] ti-udma 485c0000.dma-controller: Channels: 35 (tchan: 20, rchan: 15)
[    1.322909] printk: legacy console [ttyS2] disabled
[    1.596105] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 237, base_baud = 3000000) is a 8250
[    1.605021] printk: legacy console [ttyS2] enabled
[    1.605021] printk: legacy console [ttyS2] enabled
[    1.605027] printk: legacy bootconsole [ns16550a0] disabled
[    1.605027] printk: legacy bootconsole [ns16550a0] disabled
[    1.631544] 7 fixed-partitions partitions found on MTD device fc40000.spi.0
[    1.631565] Creating 7 MTD partitions on "fc40000.spi.0":
[    1.631572] 0x000000000000-0x000000080000 : "ospi.tiboot3"
[    1.634230] 0x000000080000-0x000000280000 : "ospi.tispl"
[    1.635945] 0x000000280000-0x000000680000 : "ospi.u-boot"
[    1.637551] 0x000000680000-0x0000006c0000 : "ospi.env"
[    1.639209] 0x0000006c0000-0x000000700000 : "ospi.env.backup"
[    1.640962] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
[    1.640975] mtd: partition "ospi.rootfs" is out of reach -- disabled
[    1.642561] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
[    1.642579] mtd: partition "ospi.phypattern" is out of reach -- disabled
[    1.644380] cadence-qspi fc40000.spi: Pattern not found. Skipping calibration.
[    1.645496] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA01103, cpsw version 0x6BA81103 Ports: 3 quirks:00000006
[    1.646631] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
[    1.679872] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.681122] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5
[    1.681136] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512, Policers 32
[    1.682345] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:1
[    1.762422] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 19
[    1.769502] /bus@f0000/i2c@20000000/tps6598x@3f/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
[    1.769692] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20000000/tps6598x@3f/connector
[    1.777595] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[    1.777632] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
[    1.777787] xhci-hcd xhci-hcd.0.auto: USB3 root hub has no ports
[    1.777794] xhci-hcd xhci-hcd.0.auto: hcc params 0x0258fe6d hci version 0x110 quirks 0x0000808020000010
[    1.778074] xhci-hcd xhci-hcd.0.auto: irq 252, io mem 0x31100000
[    1.779233] hub 1-0:1.0: USB hub found
[    1.779288] hub 1-0:1.0: 1 port detected
[    1.794686] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
[    1.827870] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    2.016003] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver RTL8211F Gigabit Ethernet
[    2.016025] davinci_mdio 8000f00.mdio: phy[2]: device 8000f00.mdio:02, driver RTL8211F Gigabit Ethernet
[    2.017444] clk: Disabling unused clocks
[    2.025887] PM: genpd: Disabling unused power domains
[    2.026007] ALSA device list:
[    2.026014]   No soundcards found.
[    2.026774] mmc1: CQHCI version 5.10
[    2.076555] mmc1: SDHCI controller on fa00000.mmc [fa00000.mmc] using ADMA 64-bit
[    2.077050] Waiting for root device PARTUUID=076c4a2a-02...
[    2.126188] mmc1: error -110 whilst initialising SD card
[    2.503345] mmc1: error -110 whilst initialising SD card
[    2.885967] mmc1: error -110 whilst initialising SD card
[    3.285744] mmc1: error -110 whilst initialising SD card

Questions:
Are there specific timing requirements or tuning steps required for DDR50 on the AM6234 that differ from the EVM defaults?  

Does the Linux device tree or U-Boot configuration require additional properties (e.g., specific itapdly or otapdly values) to stabilize the DDR50 connection?Or are there other areas that need adjustment?

Any guidance on troubleshooting this timing or signal integrity issue would be greatly appreciated.

  • 0
    Intellectual 470 points

    Supplementary Information

    Test Method and Details
    1. The same SD card was used for testing on both the AM62x EVM board and the AM6234 custom board.
    2. The SD card image was based on SDK v11.01 RT.
    3. The device tree was configured to limit the SD interface to DDR50 mode.
    &sdhci1 {
    	/delete-property/ no-1-8-v;
    	vmmc-supply = <&vdd_mmc1>;
    	vqmmc-supply = <&vdd_sd_dv>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	bus-width = <4>;
    	ti,driver-strength-ohm = <40>;
    	disable-wp;
    	max-frequency = <50000000>;
    	sdhci-caps-mask = <0x00000003 0x00000000>;
    	sd-uhs-ddr50;
    	/delete-property/ sd-uhs-sdr104;
    	/delete-property/ sd-uhs-sdr50;
    };
    1. With the device tree limited to DDR50 mode, the AM62x EVM board boots successfully.
    root@SDX500Pro:~# cat /sys/kernel/debug/mmc1/ios

    clock:          50000000 Hz
    actual clock:   50000000 Hz
    vdd:            21 (3.3 ~ 3.4 V)
    bus mode:       2 (push-pull)
    chip select:    0 (don't care)
    power mode:     2 (on)
    bus width:      2 (4 bits)
    timing spec:    7 (sd uhs DDR50)
    signal voltage: 1 (1.80 V)
    driver type:    0 (driver type B)
    1. Current issue:

    When the device tree is limited to DDR50 mode on the AM6234 custom board, the boot process stops at the following message and cannot continue:

    [    2.077050] Waiting for root device PARTUUID=076c4a2a-02...
    [    2.126188] mmc1: error -110 whilst initialising SD card

    This issue does not occur on the AM62x EVM board under the same DDR50 configuration.

  • 0 in reply to Charlie chen
    TI__Guru* 89631 points
    Charlie chen said:
    This issue does not occur on the AM62x EVM board under the same DDR50 configuration.

    If the issue does not occur on the TI EVM with the same SD card then it's mostly the custom board's schematics issue. Please note the DDR50 is not supported on the AM62.

    git.ti.com/.../

  • 0 in reply to Prashant Shivhare
    TI__Mastermind 30817 points

    Hi Prashant,

    I know DDR50 is not supported on sdhci0 for eMMC, but it is available in latest SDK12.x dts for sdhci1 and sdhci2?

    	compatible = "ti,am62-sdhci";
		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
		clock-names = "clk_ahb", "clk_xin";
		bus-width = <8>;
		mmc-hs200-1_8v;
		ti,clkbuf-sel = <0x7>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-mmc-hs = <0x0>;
		ti,otap-del-sel-hs200 = <0x6>;
		ti,itap-del-sel-legacy = <0x0>;
		ti,itap-del-sel-mmc-hs = <0x0>;
		status = "disabled";
	};

	sdhci1: mmc@fa00000 {
		compatible = "ti,am62-sdhci";
		reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
		clock-names = "clk_ahb", "clk_xin";
		bus-width = <4>;
		ti,clkbuf-sel = <0x7>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-sd-hs = <0x0>;
		ti,otap-del-sel-sdr12 = <0xf>;
		ti,otap-del-sel-sdr25 = <0xf>;
		ti,otap-del-sel-sdr50 = <0xc>;
		ti,otap-del-sel-sdr104 = <0x6>;
		ti,otap-del-sel-ddr50 = <0x9>;
		ti,itap-del-sel-legacy = <0x0>;
		ti,itap-del-sel-sd-hs = <0x0>;
		ti,itap-del-sel-sdr12 = <0x0>;
		ti,itap-del-sel-sdr25 = <0x0>;
		status = "disabled";
	};

	sdhci2: mmc@fa20000 {
		compatible = "ti,am62-sdhci";
		reg = <0x00 0x0fa20000 0x00 0x1000>, <0x00 0x0fa28000 0x00 0x400>;
		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
		clock-names = "clk_ahb", "clk_xin";
		bus-width = <4>;
		ti,clkbuf-sel = <0x7>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-sd-hs = <0x0>;
		ti,otap-del-sel-sdr12 = <0xf>;
		ti,otap-del-sel-sdr25 = <0xf>;
		ti,otap-del-sel-sdr50 = <0xc>;
		ti,otap-del-sel-sdr104 = <0x6>;
		ti,otap-del-sel-ddr50 = <0x9>;
		ti,itap-del-sel-legacy = <0x0>;
		ti,itap-del-sel-sd-hs = <0x0>;
		ti,itap-del-sel-sdr12 = <0x0>;
		ti,itap-del-sel-sdr25 = <0x0>;
		status = "disabled";
	};

  • 0 in reply to Tony Tang
    TI__Guru* 89631 points

    Hi Tony,

    Tony Tang said:
    I know DDR50 is not supported on sdhci0 for eMMC, but it is available in latest SDK12.x dts for sdhci1 and sdhci2?

    That is correct. It is supported on the MMC1/2.

    Do they have their schematics already reviewed by TI?

  • 0 in reply to Prashant Shivhare
    Prodigy 150 points

    Hi Prashant

    We had it reviewed by TI once; I've attached the circuit diagram. You can take a look if needed

  • 0 in reply to neil chen
    TI__Guru* 89631 points

    Hello,

    neil chen said:
    We had it reviewed by TI once; I've attached the circuit diagram. You can take a look if needed.

    Please create a separate thread for the schematics review.

    In the meantime, is the U-Boot able to successfully initialize the SD card in DDR50? Is the SDR104 working?

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    A. Both U-Boot and kernel device trees were modified to limit the SD interface to DDR50 mode.
    Under this configuration, the AM62x EVM board boots successfully.

    B. Current issue:

    After modifying both the U-Boot and kernel device trees to force DDR50 mode, the AM6234 custom board fails during boot and stops with the following log:

    U-Boot SPL 2025.01-gd2a72467939e-dirty (May 15 2026 - 09:20:07 +0800)
    SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
    SPL initial stack usage: 2032 bytes

    ** Bad device specification mmc 1 **
    Couldn't find partition mmc 1:1
    Error: could not access storage.

    Trying to boot from MMC2
    spl: mmc init failed with error: -110

    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###

    C. The issue only occurs on the AM6234 custom board when DDR50 mode is enabled in both the U-Boot and kernel device trees.

    D. The AM62x EVM board can boot normally under the same configuration.

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    Thanks for the support. I’d also like to provide some additional results from the custom board revisions:

    1. On the AM6234 custom board Alpha hardware, the SD card can only run in Legacy mode at 25 MHz with SDK v10.01.
    2. On the AM6234 custom board Beta1 hardware, the SD card can only run in HS (High Speed) mode at 50 MHz with SDK v11.01 RT.
    3. On the AM6234 custom board Beta2 hardware, we are trying to run the SD card in DDR50 mode at 50 MHz with SDK v11.01 RT. However, the result is the same as previously described.
  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    For both the Alpha and Beta1 custom boards, the SD card can only work properly when forced to 3.3V operation.
    If the voltage is switched to 1.8V for high-speed mode, the system fails to operate correctly.

    You can also refer to the previous test results and discussion on TI E2E:

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1545164/am623-boot-fail-issue?tisearch=e2e-sitesearch&keymatch=%20user%3A624725#

  • 0 in reply to Charlie chen
    TI__Guru* 89631 points

    Hello,

    Could you please the A53 U-Boot images? I would like to extract the DTBs and review the SD card node.

    Please also enable the CONFIG_MMC_TRACE=y in the A53 defconfig and share the boot logs.

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    Hello,

    After enabling CONFIG_MMC_TRACE=y in the U-Boot configuration, the following boot failure log is provided for analysis.

    For reference, I am also attaching the following files:

    1. k3-am625-sk.dts contents
    2. u-boot.img file

    ???

    U-Boot SPL 2025.01-gd2a72467939e-dirty (May 15 2026 - 09:16:02 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
Changed A53 CPU frequency to 1250000000Hz (T grade) in DT
SPL initial stack usage: 13392 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE: BL31: v2.13.0(release):v2.13.0-240-gd90bb650fe-dirty
NOTICE: BL31: Built : 21:37:18, Jun 23 2025

U-Boot SPL 2025.01-gd2a72467939e-dirty (May 18 2026 - 14:12:53 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
SPL initial stack usage: 2032 bytes
CMD_SEND:0
ARG 0x00000000
MMC_RSP_NONE
CMD_SEND:8
ARG 0x000001aa
MMC_RSP_R1,5,6,7 0x000001aa
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0xc1ff8000
CMD_SEND:11
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000320
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
** Bad device specification mmc 1 **
Couldn't find partition mmc 1:1
Error: could not access storage.
Trying to boot from MMC2
CMD_SEND:0
ARG 0x00000000
MMC_RSP_NONE
CMD_SEND:8
ARG 0x000001aa
MMC_RSP_R1,5,6,7 0x000001aa
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0x00ff8000
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000120
CMD_SEND:41
ARG 0x41300000
MMC_RSP_R3,4 0xc1ff8000
CMD_SEND:11
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x00000320
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
CMD_SEND:2
ARG 0x00000000
RET -110
spl: mmc init failed with error: -110
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    k3-am625-sk.dts

    // SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* AM625 SK: www.ti.com/.../sprr448
*
* Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
*/

/dts-v1/;

#include "k3-am62x-sk-common.dtsi"

#include "k3-timesync-router.h"

/ {
compatible = "ti,am625-sk", "ti,am625";
model = "Texas Instruments AM625 SK";

opp-table {
/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
};
};

memory@80000000 {
bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;

};

vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};

vcc_5v0: regulator-1 {
/* Output of LM34936 */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};

vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};

vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
vin-supply = <&vcc_3v3_sys>;
#if defined(TECOM_BOOT_MODIFY) && (TECOM_BOOT_MODIFY==1)
#else
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
#endif
};

vdd_sd_dv: regulator-4 {
/* Output of TLV71033 */
bootph-all;
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
pinctrl-0 = <&vdd_sd_dv_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vcc_5v0>;
gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
};

vcc_1v8: regulator-5 {
/* output of TPS6282518DMQ */
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3_sys>;
regulator-always-on;
regulator-boot-on;
};
};

&vmain_pd {
bootph-all;
};

&vcc_5v0 {
bootph-all;
};

&vcc_3v3_sys {
bootph-all;
};

&vdd_mmc1 {
bootph-all;
};

&main_pmx0 {
main_rgmii2_pins_default: main-rgmii2-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
>;
};

vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};

main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
};

&main_gpio0 {
bootph-all;
};

&main_gpio1 {
bootph-all;
};

&main_i2c1 {
bootph-all;
exp1: gpio@22 {
bootph-all;
status = "disable";
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
"PRU_DETECT", "MMC1_SD_EN",
"VPP_LDO_EN", "EXP_PS_3V3_En",
"EXP_PS_5V0_En", "EXP_HAT_DETECT",
"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
"UART1_FET_BUF_EN", "WL_LT_EN",
"GPIO_HDMI_RSTn", "CSI_GPIO1",
"CSI_GPIO2", "PRU_3V3_EN",
"HDMI_INTn", "PD_I2C_IRQ",
"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
"MCASP1_FET_SEL", "UART1_FET_SEL",
"TSINT#", "IO_EXP_TEST_LED";

interrupt-parent = <&main_gpio1>;
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;

pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
};
};

&sdhci1 {
/* 不要加 no-1-8-v，否則會關掉 1.8V UHS mode */
/delete-property/ no-1-8-v;

vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;

pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;

bus-width = <4>;
ti,driver-strength-ohm = <40>;
disable-wp;

/* 限制 SD bus clock 最大 50 MHz */
max-frequency = <50000000>;

/*
* 限制最高 UHS mode 到 DDR50。
* TI latest AM62x 文件範例：Limit to DDR50
*/
sdhci-caps-mask = <0x00000003 0x00000000>;

/* 保留 DDR50 支援 */
sd-uhs-ddr50;

/* 如果你的 base dts / overlay 其他地方有開 SDR104 / SDR50，建議刪掉 */
/delete-property/ sd-uhs-sdr104;
/delete-property/ sd-uhs-sdr50;

};

&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;

cpts@3d000 {
/* MAP HW3_TS_PUSH to GENF1 */
ti,pps = <2 1>;
};
};

&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy1>;
};

&cpsw3g_mdio {
cpsw3g_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};

&fss {
bootph-all;
};

&ospi0 {
status = "okay";
flash@0 {
bootph-all;
//#if defined(TECOM_BOOT_MODIFY) && (TECOM_BOOT_MODIFY==1)
#if 1
compatible = "winbond,w25q64dw","jedec,spi-nor";
#else
compatible = "jedec,spi-nor";
#endif
reg = <0x0>;
//#if defined(TECOM_BOOT_MODIFY) && (TECOM_BOOT_MODIFY==1)
#if 1
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;/* QSPI 4-bit read */
spi-max-frequency = <25000000>;
#else
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <25000000>;
#endif
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
cdns,phy-mode;

partitions {
bootph-all;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "ospi.tiboot3";
reg = <0x0 0x80000>;
};

partition@80000 {
label = "ospi.tispl";
reg = <0x80000 0x200000>;
};

partition@280000 {
label = "ospi.u-boot";
reg = <0x280000 0x400000>;
};

partition@680000 {
label = "ospi.env";
reg = <0x680000 0x40000>;
};

partition@6c0000 {
label = "ospi.env.backup";
reg = <0x6c0000 0x40000>;
};
};
};
};

&tlv320aic3106 {
DVDD-supply = <&vcc_1v8>;
};

&timesync_router {
mux-reg-masks-state = <
K3_TS_OFFSET(12, 0x0001ffff, 17)
>;
status = "okay";
};

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    "Could you please the A53 U-Boot images? "
    Sure. Please let me know how you would like me to provide the A53 U-Boot images.

  • 0 in reply to Charlie chen
    TI__Guru* 89631 points

    CMD_SEND:11
    ARG 0x00000000
    MMC_RSP_R1,5,6,7 0x00000320
    CMD_SEND:2
    ARG 0x00000000
    RET -110

    From these logs, the issue is likely related to the voltage switching. After this error happens, could you please probe the board if the I/O voltage is at 1.8V only? If it is, can you try booting with another SD card?

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    Hello,

    1. The measured I/O voltage on the motherboard is only 1.8V.
    2. The same boot images (tiboot3.bin, tispl.bin, and u-boot.img) were copied to other SD cards, but the boot result remains the same:
    U-Boot SPL 2025.01-gd2a72467939e-dirty (May 15 2026 - 09:20:07 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
SPL initial stack usage: 2032 bytes

** Bad device specification mmc 1 **
Couldn't find partition mmc 1:1
Error: could not access storage.

Trying to boot from MMC2
spl: mmc init failed with error: -110

SPL: failed to boot from all boot devices
  • 0 in reply to Charlie chen
    TI__Guru* 89631 points
    Charlie chen said:
    The measured I/O voltage on the motherboard is only 1.8V.

    If this is the case then I am not sure about the cause of the issue. Just in case, you could try the latest SDK version once.

    Also, is the SD card schematics reviewed by TI and the suggestions, if any, are implemented?

  • 0 in reply to Prashant Shivhare
    Prodigy 150 points

    Hi 
    TI has reviewed the circuit diagram and made modifications based on their suggestions.

    B.R.

  • 0 in reply to neil chen
    TI__Guru* 89631 points

    Have you modified the "vqmmc-supply" as per the voltage switching logic on your custom board?

    Also, it is difficult to get the full insights from he "k3-am625-sk.dts" alone. Please share the U-Boot images itself that you are booting on the board. I would extract the DTBs from them and convert them to DTS.

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    Hello,

    1.The U-Boot image used on the custom board is shared at the following link:

    u-boot.img Dropbox Link

    2.As per your suggestion, we tested with the SDK v12.00 image
    Processor SDK Linux RT AM62x Yocto - SD card image (tisdk-default-image-rt-am62xx-evm-12.00.00.07.04.rootfs.wic.xz).

    The image was flashed to a 64GB SD card and tested on both the EVM board and the custom board. However, the result is the same as shown below, and the system cannot boot properly.


    U-Boot SPL 2026.01-ti-g2549829cc194 (Mar 26 2026 - 18:58:28 +0000)
    SYSFW ABI: 4.0 (firmware rev 0x000c '12.0.2--v12.00.02 (Clever Cat)')
    Set clock rates for '/a53@0', CPU: 1250MHz at Speed Grade 'T'
    SPL initial stack usage: 13440 bytes
    Trying to boot from MMC2
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Starting ATF on ARM64 core...

    NOTICE: BL31: v2.14.0(release):sandbox/v2.14-472-g76500ceaee
    NOTICE: BL31: Built : 11:33:22, Feb 2 2026

    U-Boot SPL 2026.01-ti-g2549829cc194 (Mar 26 2026 - 18:58:28 +0000)
    SYSFW ABI: 4.0 (firmware rev 0x000c '12.0.2--v12.00.02 (Clever Cat)')
    SPL initial stack usage: 2016 bytes
    ** Bad device specification mmc 1 **
    Couldn't find partition mmc 1:1
    Error: could not access storage.
    Trying to boot from MMC2
    spl: mmc init failed with error: -110
    Error: -110
    SPL: Unsupported Boot Device!
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###

    3.If we use the SDK v11.01 image(The version currently in use):
    tisdk-default-image-rt-am62xx-evm-11.01.05.03.rootfs.wic.xz
    the EVM board can boot and run normally.

  • 0 in reply to Charlie chen
    TI__Guru* 89631 points
    Charlie chen said:
    1.The U-Boot image used on the custom board is shared at the following link:

    The link only contains the A53 U-Boot while the issue we are debugging is at A53 SPL. Anyways, the DTB should be same for both A53 SPL and U-Boot. In the extracted DTB, I can see it has the same sdhci1 node as the DTB from the default U-Boot image except the following additional properties

      @@ -25,5 +25,9 @@
                        disable-wp;
                        vmmc-supply = <0x26>;
                        vqmmc-supply = <0x27>;
  +                     ti,driver-strength-ohm = <0x28>;
  +                     max-frequency = <0x2faf080>;
  +                     sdhci-caps-mask = <0x03 0x00>;
  +                     sd-uhs-ddr50;
                        phandle = <0xa5>;
                };

    The last three additions are consistent with enabling the DDR50 speed mode but the drive strength change is not expected.

    And I see there are no changes in the "vqmmc-supply" node which controls the I/O voltage switch. Do you have the same implementation on your custom board for I/O voltage switch as the TI EVM and so you did not change the steps in DTS?

  • 0 in reply to Prashant Shivhare
    Intellectual 470 points

    Hello,
    Thank you for your support. I have gathered the related U-Boot files together and shared them through the following link for your analysis.
    www.dropbox.com/.../ALoUooJ1ZLJ9dSyfc-jFd94

  • 0 in reply to Prashant Shivhare
    Prodigy 150 points

    HI 
    Our MMC power supply is the same as the EVM, and the GPIO for controlling the PMIC is also the same as the EVM.

  • 0 in reply to neil chen
    TI__Mastermind 30817 points

    TPS65219 PMIC is used in SK-AM62B LP board, not SK-AM62B P1 board, the dts should be k3-am62-lp-sk.dts. 

  • 0 in reply to Tony Tang
    Prodigy 150 points

    Hi Tony
    But the SK-AM62B P1 board uses TPS65219, right? The BOM and circuit diagram shown below are both


  • 0 in reply to neil chen
    TI__Mastermind 30817 points

    Sorry, my fault.

  • 0 in reply to Tony Tang
    Mastermind 8355 points

    Hi Tony,

    Kindly follow up on this critical issue.

    As shown in the attached BOM and schematics below, our custom board following the SK-AM62B P1 design indeed populates the TPS65219 PMIC.

    This hardware/software mismatch on the P1 framework is causing the regulator node configuration to be incorrect, which directly blocks the SD card voltage switching during the A53 SPL / DDR50 initialization phase.

    Could you please sync with your internal team and advise:

    Should we manually port the PMIC/regulator nodes from k3-am62-lp-sk.dts into the P1 base dts?

    Are there any specific SPL configurations or patches required to make the TPS65219 work properly on this P1 setup?

    This SD boot failure is a major showstopper for our custom board bring-up milestone. Your prompt guidance or escalating this to the software team would be highly appreciated.

    Thanks,

    Daniel

  • 0 in reply to Daniel Cheng1
    TI__Mastermind 30817 points

    Daniel,

    is the expert from application team.

  • 0 in reply to Tony Tang
    Mastermind 8355 points

    Hi  

    Could you help this case?

    Thanks

    Dnaiel