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TDA4VEN-Q1: GPIO0/GPIO1 conflict

cesar.xu
Intellectual 490 points

Part Number: TDA4VEN-Q1
Other Parts Discussed in Thread: SYSCONFIG

Hi,

GPIO0_60

image.png

GPIO1_60

image.pngimage.png

image.png

image.png

The GPIO1_60 do not correspond

 

Regards,

Cesar

  • 0
    TI__Mastermind 28620 points

    Hi ,

    I am able to see the issue as well. It looks like all of the GPIO pins that are shared with OLDI0 are broken. I have let our development team know.

    In the meantime, the offset/macro for the device tree should be:

    J722S_IOPAD(0x027c, PIN_INPUT, 7)

    You will also need to set the pinmux for GPIO1_61, because it is the pair for OLDI0_A4P/N

    J722S_IOPAD(0x0280, PIN_INPUT, 7)

    Datasheet excerpt:

    "The GPIO functionality of these pins is configured by setting MUXMODE = 7 for both PADCONFIG registers of each OLDI pair. The positive pin's PADCONFIG register controls the ST_EN and PULLUDEN for the positive and negative pin. Only a pulldown is available on these pins and the PULLUDEN is active high."

    Best,
    Jared

  • 0
    TI__Expert 7980 points

    Hi Cesar, 

    Please refer to the latest datasheet.

    To configure these within the SysConfig PinMux Tool, please add a OLDI_GPIO instance on the lefthand side in the latest version of the tool and consider Jared's comment. Example: 

    Regards,
    Mark