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TMS320C6746: How to boot TMS320C6746

Muthu Valluar
Prodigy 30 points

Part Number: TMS320C6746
Other Parts Discussed in Thread: OMAP-L138

In one of our products, we changed the mDDR memory to DDR2 memory. We need help booting this processor. The tool in use is “sfh_OMAP-L138.exe”. We need help getting the source files for this tool, updating DDR2 parameters, and compiling and running it on Windows and Linux, preferably Linux.
 
  • 0
    TI__Guru* 86145 points

    Hello 

    These devices are now on limited support and we will not be able to provide much in depth support. Here is the AI assited response, with some helper guidance and link to download the utilities etc. No linux support AFAIK. 

    Booting OMAP-L138 with DDR2 Using the SFH Tool

    Here's a complete walkthrough covering source acquisition, DDR2 parameter modification, and building/running on both platforms.

    1. Get the Source Files

    The sfh_OMAP-L138.exe source code is included in the OMAP-L138 Flash and Boot Utilities package. Download it from TI's website [1]. The pre-built executables are configured for EVMs only — since you're on a custom board with a memory change, you must rebuild from source [1].

    2. Update DDR2 Parameters

    The key file to modify is:

    OMAP-L138/Common/src/device.c

    Modify the parameters passed to the DEVICE_ExternalMemInit function to match your DDR2 timing requirements [1].

    Registers You Need to Configure

    Four memory-mapped registers must be programmed to match your DDR2 device's datasheet [2]:

    Register
    Purpose
    SDCR (SDRAM Configuration Register)
    Bus width, CAS latency, bank count, page size, memory type
    SDTIMR1 (SDRAM Timing Register 1)
    Primary timing parameters (tRCD, tRP, tRAS, etc.)
    SDTIMR2 (SDRAM Timing Register 2)
    Secondary timing parameters
    SDRCR (SDRAM Refresh Control Register)
    Refresh rate
    DRPYC1R (DDR PHY Control Register)
    Board-layout dependent, not DDR2-spec dependent

    Critical SDCR Changes for mDDR → DDR2

    Since you're switching from mDDR to DDR2, these SDCR bit fields are essential [2]:

    Field
    mDDR Value
    DDR2 Value
    Notes
    MSDRAMEN (bit 25)
    1
    0
    Disable mobile SDRAM mode
    DDR2EN (bit 20)
    0
    1
    Enable DDR2 mode
    DDREN (bit 17)
    1
    1
    Keep enabled
    SDRAMEN (bit 16)
    1
    1
    Keep enabled
    DDR2TERM[1:0] (bits 27, 21)
    —
    00
    ODT not supported, must be cleared
    CL (bits 11–9)
    Per mDDR spec
    Per DDR2 spec
    e.g., 3h for CAS latency 3
    IBANK (bits 6–4)
    Per mDDR spec
    Per DDR2 spec
    e.g., 3h for 8 banks
    PAGESIZE (bits 2–0)
    Per mDDR spec
    Per DDR2 spec
    e.g., 2h for 1024-word page
    NM (bit 14)
    Per board
    Per board
    1h = 16-bit bus width

    Important: To write to MSDRAMEN, DDR2EN, DDREN, SDRAMEN, and drive/termination fields, you must first set BOOTUNLOCK (bit 23) to 1, write your values, then clear BOOTUNLOCK back to 0 [2].

    Note: Since you're moving away from mDDR, you no longer need to program the SDCR2 register, which is only required for mDDR interfaces [2].

    For a reference DDR2 configuration (16-bit bus, CAS latency 3, 8 banks, 1024-word page), see Table 15-15 in the TRM [2]. Different DDR2 parts require different timing values — for example, the LCDK board used Samsung K4T1G164QF-BCF8 on one revision and Winbond W971GG6KB-25 on another, each with distinct timing parameters [3].

    3. Build and Run

    On Linux (Preferred)

    Prerequisites — ensure these are in your PATH [4]:

    • Mono Framework (latest open-source version)
    • GNU cross-compiler tools (arm-arago-linux-gnueabi-gcc, etc.)
    • TI C6x Compiler Tools (free from TI's website)

    Build steps:

    # 1. Edit build.mak under the Common directory — set paths to TI ARM and C6x compilers
    # 2. Navigate to the GNU directory and build:
    cd OMAP-L138/gnu
    make

    Run:

    mono ./sfh_OMAP-L138.exe [options]

    [4]

    On Windows

    Requires .NET Framework 2.0+. Run directly from a command prompt:

    ..\OMAP-L138\gnu\sfh_OMAP-L138.exe [options]

    Set boot pins to UART2 boot mode, connect the serial cable, run the command, then power on the board [1].

    Other Potential Modifications

    Depending on your custom board, you may also need to update [1]:

    • PLL settings in device.c (if your input clock ≠ 24 MHz)
    • UART peripheral number in device_uart.h (if not using UART2)
    • SPI/NAND settings if your flash configuration differs from the EVM

    To help refine the DDR2 register values, it would be helpful to know:

    • The specific DDR2 part number on your board (needed to extract exact timing parameters like tRCD, tRP, tRAS, CAS latency from its datasheet)
    • Whether you're using an x8 or x16 DDR2 bus configuration
    • Your board's input oscillator frequency (if different from 24 MHz, PLL settings also need updating)
    • Your current mDDR configuration values in device.c (useful as a starting reference)
    1. OMAP-L138 Flash and Boot Utilities Application Report (SPRACM8A)
    2. OMAP-L138 Technical Reference Manual (SPRUH77C) — DDR2/mDDR Controller Registers
    3. OMAP-L138 LCDK Hardware Reference (SPRUIL2A)
    4. OMAP-L138 Flash and Boot Utilities — Linux Build Instructions (SPRACM8A)