[MCSDK / QMSS] How to allocate QMSS accumulator resources and eventIds?

David Aldrich

We are implementing a simple inter-core communication system on the 6670 DSP using the QMSS features of MCSDK. We only need to support two cores. Each core will have a reception (Rx) queue that the other core can post a message (i.e. descriptor to). We have already got this working using polling, i.e. each core polls its own Rx queue for messages.

We have now implemented this with an interrupt in one core only, i.e. the core is interrupted when a descriptor is posted in its Rx queue. We did this by following the MCSDK example project ‘PA_emacExample’. We used the same resources as in the example, that is:

IRQ number           7

System event        48   (the example code states that this corresponds to Accumulator Channel 0)

Accumulator channel 0

PDSP                 0

My question is, what numbers of the above parameters can I use for the other core?

E.g. should I use accumulator channel 1 for the other core and, if so, which event id should I use?

Best regards

David

over 13 years ago

0 tscheck over 13 years ago

TI__Mastermind 23525 points

David,

You can re-use:

IRQ Number 7 - Look at section 9.2.3 of http://www.ti.com/lit/ug/sprugw0b/sprugw0b.pdf this is common per core as long as you set up the core's interrupt selectors the same.

System event 48 - You can use the same system event too, note that this corresponds to a different QM queue though.

You will have to use a different Accumulator channel, i.e. 1 for example, and then refer to http://www.ti.com/lit/ug/sprugr9d/sprugr9d.pdf on how to program that accumulator channel to correspond to queue (in this case 705).

Regards,

Travis

0 David Aldrich over 13 years ago in reply to tscheck

Expert 1345 points

Thanks, that was a great help. It works now.

Best regards

David

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[MCSDK / QMSS] How to allocate QMSS accumulator resources and eventIds?