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MOTOR-CONTROL-SDK-AM243X: Question about SDFM Module on AM243x

Maeda
Prodigy 110 points

Part Number: MOTOR-CONTROL-SDK-AM243X
Other Parts Discussed in Thread: SYSCONFIG

Dear TI Support Team,

I have some questions regarding the SDFM module on AM243x.

■ Questions

  1. In the AM243x SDFM, is it possible for each channel to receive an independent SD_CLK input?
    Or is it defined by design that all channels must share a common clock?

  2. In the current sample applications, it appears that all channels operate with a common clock.
    Is this behavior due to a software limitation (SDK / PRU firmware),
    or is it a constraint of the hardware specification?

  3. If it is hardware-supported to receive independent SD_CLK inputs per channel,
    is it possible to achieve this by modifying the SDK driver or PRU firmware?
    If so, could you please provide an overview of how this can be implemented?

■ Target Use Case

I would like to use the AM243x SDFM to receive output signals from six AMC1303E devices,
and operate each channel under independent conditions (clock and sampling).

■ What I Have Checked / Issue

I tested the following sample applications:

  • icss_sdfm_three_channel_with_continuous_mode
  • icss_sdfm_nine_channel_with_continuous_mode

In these examples, it appears that a single SD_CLK generated by the AM243x is shared across all channels,
and I was not able to configure each channel to receive an independent SD_CLK.

Additionally, I attempted to apply different configurations per channel,
but channels ch0 to ch2 seem to still operate in a non-independent manner.

■ Development Environment

  • Windows 11
  • CCS 20.1.1
  • motor_control_sdk_am243x_09_02_00_12
  • 0
    TI__Expert 4990 points

    Maeda said:

    • In the AM243x SDFM, is it possible for each channel to receive an independent SD_CLK input?
      Or is it defined by design that all channels must share a common clock?

    • In the current sample applications, it appears that all channels operate with a common clock.
      Is this behavior due to a software limitation (SDK / PRU firmware),
      or is it a constraint of the hardware specification?

    • If it is hardware-supported to receive independent SD_CLK inputs per channel,
      is it possible to achieve this by modifying the SDK driver or PRU firmware?
      If so, could you please provide an overview of how this can be implemented?

    You can configure independent clocks through SysConfig. There is no limitation with the firmware or driver, but there is a mode called "snoop mode," which does not support independent clocks.https://software-dl.ti.com/processor-industrial-sw/esd/motor_control_sdk/am243x/2025_00_00_06/docs/api_guide_am243x/EXAMPLES_CURRENT_SENSE.html

    Maeda said:
    Additionally, I attempted to apply different configurations per channel,
    but channels ch0 to ch2 seem to still operate in a non-independent manner.

    Can you share more details about the configuration you applied per channel?

    Maeda said:
    motor_control_sdk_am243x_09_02_00_12

    We recommend using the latest version of the motor control SDK, which includes some fixes related to independent clock.www.ti.com/.../2025.00.00.06

    BR,

    Achala Ram

  • 0 in reply to Achala Ram
    Prodigy 110 points

    Dear Achala,

    Thank you for your response.
    Regarding points 1 and 3, I understand your explanation.
    For question 2, I would like to confirm my understanding with additional details.
    I configured the settings in SysConfig as shown (screenshot attached).


    However, in this configuration, no interrupt is generated, and the converted values are not stored into the array.
    In this case, is the conversion itself still being performed internally, and only the interrupt is not triggered?
    Or does this indicate that the conversion is not working correctly?

    BR,

    Maeda

  • 0 in reply to Maeda
    TI__Expert 4990 points

    Hi Maeda,

    did you check with 2025 release ?

    BR,

    Achala Ram

  • 0 in reply to Achala Ram
    Prodigy 110 points

    Hi Achala,

    I just checked with ver 2025_00_00_06.

    Using the SDFM, I was able to confirm that the analog values are being detected correctly.

    Thank you for your support.

    BR,

    Maeda