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Questions on DDR2 setup for AM335x

thomas ng
Intellectual 410 points
Other Parts Discussed in Thread: TMDXEVM3358

Hi,

I plan to reference the TMDXEVM3358 kit and AM335xSDK-05.03.02.00 to build and bring up a new target board. 
For DDR2, instead of using 2pcs of MT47H256M8, I plan to use a single MT47H64M16 which has 16-bit bus with 1Gbit capacity.

But I have the following questions on setting up the new DDR2:

(1)
Looking at the source code, it seems that the only place that setup the EMIF for the DDR2 is in the function config_am335x_ddr(), which is called only by SPL. 
Am I correct ?

(2)
Does the u-boot or kernel re-configure the EMIF again after it was setup in SPL ?

(3)
Is there a need to tune the values in config_am335x_ddr() in order to work with the new DDR2 ? If yes, what are usually the registers that need to be fine-tuned ?


- Thomas

  • 0
    TI__Guru* 86770 points

    Thomas, the single DDR2 you have chosen is the same one on Beaglebone, just a different capacity.  So you should be able to use most of the Beaglebone configuration.

    Yes, the EMIF configuration is in config_am335x_ddr.  There is also the DDR PLL which is configured in SPL, which is set for 266MHz, the max freq supported for AM335x with DDR2.  u-boot and kernel do not touch these configurations unless you are doing some sort of power management or standby use cases.

    You can take a look at the following wiki for a description of the registers that need to be fine-tuned (although as i said, you should just be able to use the Beaglebone configuration):  http://processors.wiki.ti.com/index.php/Setting_up_AM35x_SDRC_registers

    This is for a different device, but most of the descriptions are similar.  You should also be able to use the spreadsheet which will help with optimizing timing.

    There will be a AM335x version of the page hopefully in the near future.

    Regards,

    James

  • 0 in reply to JJD
    Intellectual 410 points

    Hi James, Thanks very much !

    - Thomas