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SWI with IPC - notify: Timing limitations?

Other Parts Discussed in Thread: SYSBIOS

Hello,

I'm just testing a little bit SYS/BIOS, IPC and Multicore-Analyzer to get a feeling for the performance of the 8 Cores. I tried a simple example where a timer is triggered every 10 us. This example works fine.

Now setting up some events for every core I just try to trigger one event on CORE1 everytime the timer is triggered (simple with Notify_sendEvent). Setting the period to 50 us, everything is okay. But setting the timer period below 50 us (example given 20 us), CORE0 will not end after a dedicated counter of triggers as before -> CORE0 is hang up in NotifyDriverShm.c on line 415 (coming from CacheProxy_inv in dsp_pe66.c line 28568).

With time measurements (using TSCL etc.), Notify_sendEvent only lasts around maximal 1 us, so I don't expect that the timer will overrun itsself. So I don't know what's the reason for this behaviour and how I can avoid it as it is necessary for our workflow to use events with all cores within a period of around 5 us.

Maybe there exists another way to notify the cores for processing in such a small time period?

Best Regards,
Bernd

  • Hello,

    having eliminated System_printf and other stuff, now notification among the cores with IPC_notify works also within a period of 10 or 5 us.

    But I wonder a little bit that the notification with Notify_sendEvent last about 1.4 us, which is a lot of stuff.
    -What causes the overhead just for signaling another core to start some work?
    -May it be the execution of the callback function?
    -Are there any other, faster possibilities to trigger a core to start some work (maybe flags or something)?

    Best Regards,
    Bernd

  • Bernd,

    Which way is the test working

    A. CORE0 notifies each core

    B. CORE0 notifies CORE1, which notifies CORE2, ... COREn notifies CORE0

    Is the 1.4 us the time for a single notify or for all cores (if case A) or roundtrip (if case B)?

    Todd

  • Hello Todd,

    I've found the answer to my questions:

    1) Fast period < 20 us
    Setting such a fast period, the problem is that registering all events havn't finished on all cores. Code structure is as follows:
    -Do some init stuff
    -Ipc_start()
    -Register events on all cores
    -if Core0 -> Timer_start (for interrupt)
    -BIOS_start

    This structure is same for all cores (single image for all cores). In all examples, the events are also registered after Ipc_start. Is there a possibility to sync all cores again like Ipc_start so that the timer is started when registration of events has been finished? It is possible to add simple a "printf" for example to delay the core that starts the timer. Then everything works fine, but this is something like a workaround I think...

    2) Long time for Notfiy_sendEvent
    The code does a mix of method a and b, some parallel and some sequentiell, e.g. Core0 to Core1, Core1 to Core2 & Core3, ... The 1.4 us is for a single notify!
    I just get the hint to use interprocessor interrupts (by just writing into the IPCGR-registers to create an interrupt), this should save a long time. I've found some examples in theforum and will test them.

    I think the correct API for setting up an ISR into the ISTP, enable it and so is the HWI in bios_6_32_05_54\packages\ti\sysbios\hal? Because I wonder that in every example I've found, the ISTP was used and then set on the appropriate interrupt. Also the KICK_OFF-ISR were set manually. Is that the easiest and correct way or may I use HWI?

    Regards,
    Bernd

  • Hello Todd,

    after some tests, I've just tested to setup an interrupt for all cores. I've followed this thread (http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/135099.aspx#485713), but there I was not sure how to setup the ISTP with my own ISR (have it really to be done in assembler?).

    Using the HWI module, I just setup an interrupt in the cfg file (see example below). Then I set the IMUX-Register by hand for every core and trigger the interrupt with writing into the IPCGR1-Register. But starting already core1 (after core0), an error is raised (that the hwi is already defined, certainly by core 0). As already said I'm using a single image for every core.

    So what's my fault setting up one interrupt for every core with the HWI module? Or how can I set the ISR into the ISTP mentioned above?

    Regards,
    Bernd

    // === cfg file ===
    var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
    var hwiParams = new Hwi.Params;
    hwiParams.arg = 10;
    hwiParams.enableInt = true;
    Program.global.HWITest = Hwi.create(5, '&IRQ_main', hwiParams);

  • Bernd,

    It is possible to setup your own Hardware interrupt vectors, place them at a certain location in your memory map, and then set the ISTP to the base address, however, I would caution you from doing this if using SYSBIOS since this is what SYSBIOS does for you already.

    Core1 starting after Core0 is not the cause of the "error raise".  Each core has its own interrupt vectors so they do no collide with one another.  If you are getting an error raise, its because someone else has already Hwi #5.  Now, if you are using Ipc, I believe the default Hwi used is #5 so that would be a collision.  Also, if you are wanting to plug your own IPC interrupt then you shouldn't be using IPC because then 2 different interrupt vectors will be trying to receive the same interrupt.

    I'd like to add one line that you are missing in your *.cfg.  You need to specify the IPC eventId which is going to trigger Hwi 5.
    Depending on which device you are, this is different.  For C6670 its 90.  For C6678 its 91.

    // === cfg file ===
    var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
    var hwiParams = new Hwi.Params;
    hwiParams.arg = 10;
    hwiParams.enableInt = true;
    hwiParams.eventId = 91;                 
    Program.global.HWITest = Hwi.create(5, '&IRQ_main', hwiParams);

    Judah

  • Bernd,

    I don't know if you are aware but we do have more optimized Notify drivers then the default.

    If using IPC and assuming you are on the C6000 multicore devices, add the following lines to your *.cfg file:

    /* more optimized Notify driver */
    var Notify                  = xdc.module('ti.sdo.ipc.Notify');
    Notify.SetupProxy   = xdc.module('ti.sdo.ipc.family.c647x.NotifyCircSetup');

    /* Only necessary if using messageQ*/
    var MessageQ         = xdc.module('ti.sdo.ipc.MessageQ');
    MessageQ.SetupTransportProxy = xdc.module('ti.sdo.ipc.transports.TransportShmNotifySetup');

    Judah 

  • Bernd --

    If you want to take interrupt #5 away from IPC and use it for your ISR, you first need to delete it.

    something like this should work:

    #include <ti/sysbios/family/c64p/Hwi.h>

    ...

        Hwi_Handle hwi;

        hwi = Hwi_getHandle(5);

        Hwi_delete(&hwi);

        Hwi_create(5, .....);

    -Karl-

  • Hello,

    thanks for your answers. I was out of office, so I just try your suggestions and then give feedback.

    Regards,
    Bernd

  • Hello,

    thanks for your suggestions. I've tested them with this results:

    -use optimized drivers for Notify is faster, but a "sendEvent" lasts still 1.1 us what is too slow
    -using Interprocessor Interrupts, everything works fine (0.2 us for writing the corresponding register)
            -> error was the forgotten eventID as mentioned above

    Thanks for your help,
    Regards Bernd

  • Hello,

    I am new to C6657 and using TMDXEVM6657L and tried to use IPC with no success.

    The following code is in the beginning of my main()

    int main()

    {

        /* Call Ipc_start() */    

      do     {

            status = Ipc_start();    

      } while (status < 0);    

      printf("Ipc_started.\n");

    }

    The return status is -11 (Ipc_E_NOTREADY).

    What is my problem?  Do you have some sample code for C6657?

    Thanks.

    Regards,

    Steve

  • Hello Steve,

    it depends if you want to use the framework of IPC or if you just want to configure a HWI as IPC-Interrupt (framework lasts a little bit longer to reach the handler). For the framework, look through the examples of CCS, there you will find a lot of (e.g. Notify under IPC).

    Otherwise look into this thread; there's a simple example to configure a HWI as IPC-Interrupt: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/187011/849689.aspx#849689

    Regards,
    Bernd

  • Hi Bernd,

    Thanks for the reply and the e2e thread.  I got your Timed_interrupt2 project and it worked well.  But I have difficulties merge it into my code.

    I am currently created a project running on TMDXEVM6657L board doing audio loop back through McBSP and EDMA3.  I am using SYSBIOS 6.34.2.18, ipc 1.25.0.4, pdk 1.1.2.5, mcsdk 2.0.2.5 and xdctools 3.24.5.48.  Do you have any MessageQ example code doing inter core communications?

    Thank you for your support.

    Regards,

    Steve

  • Hello Steve,

    in the thread mentioned in the note above, their is a "simple as possible" example to use IPC with an HWI and SYSBIOS. You can try that.

    Moreover if you use CCS, you can create a new project and use the templates for IPC and I/O Examples -> C6657 -> MessageQ or Notify. Then you have the example you need.

    Regards,
    Bernd

  • Hi Bernd,

    Thanks for the quick reply.  I cannot find the "simple as possible" example from your link:  http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/187011/849689.aspx#849689

    But I found the qmssIpcBenchmark example under C:\ti\pdk_C6657_1_1_2_5\packages\ti\transport\ipc\examples\qmssIpcBenchmark.

    I will study it and let you know.

    Thanks for the support.

    Regards,

    Steve

  • Hello Steve,

    example in the thread is here: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/187011/849689.aspx#849689 (note from Jan 30 2013 23:48 PM).

    The example you found is not as much as easy due to the focus being on QMSS. The easiest way for an simple notify-example is as I described earlier: create a new project -> c6657-IPC-Template -> Notify. The sources are under CodeComposerStudio\ipc_1_25_00_04\packages\ti\sdo\ipc\examples, but its much easier to look into a created project.

    Regards,
    Bernd