TDA4VEN-Q1: Trace32 cmm scripts to enable DDR for j722s_cr5

Hi,

The J722S DDR configuration tool can be used to generate register settings in CMM format. 

https://dev.ti.com/sysconfig/?product=TDA4x_DRA8x_AM67x-AM69x_DDR_Config&device=J722S_TDA4VEN_TDA4AEN_AM67

Regards,
Kevin

Hi Kevin,

Thanks for your inputs.

Can you please share complete trace32 cmm package to enable DDR region (main script and all the sub-scripts called from the main script), to load the executable created in the DDR region.

BR,

Shubham

Hi,

I will check internally. Please note that our primary individual supporting trace32 is out of office until June 25th.

Regards,
Kevin

Hi,

Thanks for your feedback.

We have tried with the above scripts for CPU ARM-CR5-MCU but after the executable is loaded on cr5 core, the control is going to abort.

Currently we are using On board debugger CCS to make the Demo work and after that will switch to Trace32 debugger.. will update you in case any support needed for this issue.

BR,
Shubham

Most likely a reset or core cleanup is needed.  A default TRACE32 script is setup to attach and debug non-invasively where the CCS default flow will reset the core.  A SW or HW clean up likely would work.  If you use the example like j7aen_r5_dhry.cmm probably it will work thanks to clean_core.

Thanks for the follow-up and letting us know the issue is resolved.

Regards,
Kevin