Part Number: AM6442
We are using an FPGA as a NOR memory interface to the AM6442 through the GPMC interface.
The speed we are running the GPMC is very slow speed and the datasetup time specified in the technical reference manual on page 8597 does not make sense too me.
Quoted "Data setup time (GPMC side): Ensures a good capture of a burst of data (as opposed to taking a burst of data out). One word of data is processed in one clock cycle (T = 9.615 ns). The read access time between two bursts of data is tBACC = 5.2 ns. Therefore, data setup time is a clock period – tBACC = 4.415 ns of data setup "
If my period is 30.3ns, that would mean that the data setup time reading from the FPGA 25.1ns (FPGA Tsu, or a to c) with a hold time of exactly 5.2ns (d to c)?
There appears to be no margin for either datasetup (25.1ns) or data hold (5.2ns) for the AM6442 when reading from an external memory.
What is the required data setup and data hold for the AM64x when reading from an external memory device based on?
